Wafer Level Chip Package Blocking Structure for Underfill Overflow
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Solution Overview
Problem
In multi-chip package structures, underfill can easily overflow to solder pads of conductive bumps, compromising the electrical connection reliability between chips and circuit boards due to the shrinking size of chips and the proximity of these components.
Innovation Solution
A blocking structure is strategically placed outside the chip connecting zone between inner and outer pads on the first chip to prevent underfill overflow, using a combination of a metal layer and insulating layers to form a protruding structure that surrounds the inner pads and acts as a barrier to the underfill.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If chip size is reduced to accommodate more components in limited packaging space, then component density is improved, but underfill easily overflows to conductive bump solder pads compromising electrical connection reliability
Solution Approach 1:
The chip surface is segmented into different functional zones: a first area containing inner pads for chip-to-chip connections, and a second area containing outer pads for board connections. This spatial segmentation allows the underfill to be confined to the first area while preventing overflow onto the conductive bumps in the second area, thus resolving the contradiction between high component density and electrical connection reliability
Solution Approach 2:
Different regions of the chip are assigned different properties and functions. The first area is designed to receive and contain the underfill material, while the second area is protected from underfill contamination. This local differentiation enables the chip to simultaneously achieve high component density in the first area and reliable electrical connections in the second area
2Area of stationary object
If first chip size is close to second chip size to maximize packaging space utilization, then space efficiency is improved, but underfill overflow risk increases as edge proximity to conductive bumps decreases
Solution Approach 1:
The problem is solved by introducing a vertical dimension through the formation of a protruding structure that rises from the chip surface. This three-dimensional barrier effectively blocks the horizontal spread of underfill toward the conductive bumps, allowing close chip spacing while preventing underfill contamination of the second area
Data Source
AI summary
A multi-chip package structure includes a first chip, at least one blocking structure, a plurality of first conductive bumps, a second chip, a plurality of second conductive bumps and an underfill. The first chip has a chip connecting zone, a plurality of first inner pads in the chip connecting zone and a plurality of first outer pads outside of the chip connecting zone. The blocking structure is disposed between the first inner pads and the first outer pads and surrounds the first inner pads. The first conductive bumps are disposed on the first outer pads. The second chip is flipped on the chip connecting zone and has a plurality of second pads. The second conductive bumps are disposed between the first inner pads and the second pads. The underfill is disposed between the first chip and the second chip so as to cover the second conductive bumps.