Wafer-Level Package Fusion Bonding Oxide Layers

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Solution Overview

Problem

The production yield of wafer-level system-in-package (WLSiP) is low due to the use of adhesive layers with low thermal tolerance, which can fail at high temperatures, causing the device wafer and chips to separate and affecting packaging reliability.

Innovation Solution

A fusion bonding process using oxide layers on the device wafer and chips to form chemical covalent bonds, increasing mechanical bonding strength and reliability, and forming an encapsulation layer to cover the chips, thereby enhancing packaging yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If adhesive layers are used for bonding device wafer and chips, then the packaging process is simple and easy to manufacture, but the bonding reliability is low due to low thermal tolerance causing separation at high temperatures

Engineering Contradiction:
Improvepackaging process simplicityVSAvoidbonding reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the bonding mechanism from mechanical adhesion (adhesive layers) to chemical bonding (oxide layer fusion). By forming oxide layers on the device wafer and chip surfaces and then fusing them through thermal processing, the bonding reliability is significantly improved while maintaining manufacturing feasibility. The oxide layers provide high thermal stability and strong chemical bonds that prevent separation at high temperatures.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structure by combining oxide layers (such as silicon oxide) with the semiconductor substrates. The oxide layers serve as bonding interfaces that provide both chemical bonding capability and thermal stability. This composite approach replaces the adhesive layer system with an inorganic oxide-based bonding system that offers superior reliability while remaining compatible with standard semiconductor manufacturing processes.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If adhesive layers with low thermal tolerance are used, then the manufacturing cost is lower, but the production yield is low due to bonding failure at high temperatures

Engineering Contradiction:
Improvemanufacturing costVSAvoidproduction yield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent transitions from using organic adhesive layers to inorganic oxide layers for bonding. The oxide layers can withstand high temperatures during subsequent packaging processes without degrading, thereby preventing bonding failure and improving production yield. The thermal stability parameter of the bonding interface is significantly enhanced, allowing reliable processing at elevated temperatures.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical adhesion system (adhesive layers) with a chemical bonding system (oxide layer fusion). The chemical bonds formed between fused oxide layers are much stronger and more thermally stable than mechanical adhesion, leading to reduced bonding failures and improved production yield during high-temperature packaging operations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If fusion bonding process with oxide layers is used, then the bonding reliability is significantly increased, but the manufacturing process complexity increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming oxide layers on the device wafer and chip surfaces before the actual bonding step. These oxide layers are prepared in advance through deposition processes, ensuring that the surfaces are ready for fusion bonding. This preliminary preparation simplifies the overall process by pre-establishing the bonding interface characteristics.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fusion bonding process utilizes the self-properties of oxide layers to achieve bonding. When oxide-coated surfaces are brought into contact and heated, the oxide layers automatically fuse through diffusion and chemical bonding without requiring additional bonding agents or complex processing steps. The material itself provides the bonding mechanism, reducing process complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The fusion bonding process significantly increases the bonding reliability and production yield of WLSiP by forming strong chemical covalent bonds between the device wafer and chips, reducing the risk of separation and improving the overall packaging process.

Implementation Method 1

A fusion bonding process is then performed to bond the first and the second chips by bonding the corresponding first and second oxide layers

Methodology Applied
Scientific EffectChemical covalent bonding: Chemical Bonding

Data Source

PatentUS11450582B2Wafer-level package structure
Publication Date: 2022.09.20 NINGBO SEMICON INT CORP
  • US11450582B2 patent drawing
  • US11450582B2 patent drawing
  • US11450582B2 patent drawing

AI summary

A wafer-level package structure is provided, including a device wafer integrated with a first chip. The device wafer includes a first front surface integrated with the first chip and a first back surface opposite to the first front surface. A first oxide layer is formed on the first front surface. A second chip is provided to include a bonding surface, on which a second oxide layer is formed. A carrier substrate is provided to be temporarily bonded with the surface of the second chip that faces away from the bonding surface. The second chip is bonded with the device wafer through bonding the first and the second oxide layers using a fusion bonding process. The second chip and the carrier substrate are debonded. An encapsulation layer is formed on the first oxide layer and covers the second chip.