Wafer Level LED Array Series Connection and Current Diffusion
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Solution Overview
Problem
Conventional light emitting diode (LED) arrays face challenges in being driven at high voltages, requiring discrete voltage converters, increasing fabrication costs and volume, and suffering from heat generation and light loss due to complex wiring and packaging processes, especially when using AC power sources.
Innovation Solution
A flip-chip type LED array is developed without a submount substrate, using upper electrodes for connecting LEDs in series and diffusing current effectively, which also serves as a reflective layer to reduce light loss and eliminate the need for additional reflective metal layers, allowing direct mounting on printed circuit boards and operation with high voltage AC power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If discrete voltage converters and driving circuits are provided to enable LED operation with AC power sources, then LED compatibility with common power sources is improved, but fabrication costs and device volume increase
Solution Approach 1:
The patent merges multiple LED chips and their driving circuits onto a single substrate, integrating voltage conversion functionality directly into the array structure. This eliminates the need for separate discrete voltage converters and reduces overall device complexity while maintaining AC power compatibility
Solution Approach 2:
The substrate serves multiple functions simultaneously: it acts as the mounting platform for LED chips, provides electrical interconnections between chips, and integrates voltage conversion circuitry. This multi-functionality reduces the number of separate components needed and simplifies the overall system
2Reliability
If wire bonding and molding processes are used to protect bonding wires in LED arrays, then electrical connections and protection are improved, but process complexity and fabrication time increase
Solution Approach 1:
The patent extracts and eliminates the wire bonding process entirely by using direct metal interconnection layers formed through standard semiconductor fabrication techniques. The molding process is also simplified or eliminated, replacing it with more efficient packaging methods that reduce overall process complexity while maintaining protection
3Adaptability or versatility
If light emitting diodes are arranged in series to enable direct AC power operation, then adaptability to common power sources is improved, but processing time and fabrication costs increase due to additional packaging and mounting processes
Solution Approach 1:
The patent performs preliminary actions by pre-arranging LED chips in series configuration on the substrate during the array fabrication process itself, rather than requiring separate packaging and mounting steps afterward. This integration of series connection into the base fabrication process significantly reduces total processing time while enabling direct AC power operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient light extraction, improved reliability by preventing cracks, and reduced fabrication costs by eliminating the need for discrete voltage converters and complex packaging processes, while allowing direct use of AC power sources.
Implementation Method 1
upper electrodes formed over the first interlayer insulating layer and electrically connected to the first semiconductor layer of corresponding light emitting diodes through the first via hole structures
Implementation Method 2
upper electrodes formed over the first interlayer insulating layer and electrically connected to the first semiconductor layer of corresponding light emitting diodes through the first via hole structures... serves as a reflective layer to reduce light loss
Data Source
AI summary
A light emitting device including a substrate, first and second light emitting diodes (LEDs) each including first and second semiconductor layers, a first upper electrode disposed on the second LED, electrically connected to the first LED, and insulated from the second semiconductor layer of the first LED, and a second upper electrode disposed on the second LED, electrically connected to the second LED, and insulated from the second semiconductor layer of the second LED, in which a portion of the substrate between the LEDs does not overlap the semiconductor layers, the first upper electrode has a portion electrically connected to the second semiconductor layer of the second LED and covering the first portion and portions of the LEDs, and the second upper electrode has a groove partially enclosing the portion of the first upper electrode in a plan view.