Wafer-Level LED Device Segmentation for High Yield
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for manufacturing high-power LED devices are complex and costly due to the low yield of large-area LED chips, which is exacerbated by the need for intricate chip packaging and integration processes, making it impractical to produce high-power LED devices efficiently.
Innovation Solution
A wafer-level semiconductor device is developed with a substrate featuring serial and parallel groups of unit cells, where each unit cell is an independent functional unit formed by processing a semiconductor layer directly on the substrate, and these cells are electrically connected to achieve consistent ON-voltages and enhanced performance, allowing for simpler and more cost-effective manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the area of LED device chips is increased to manufacture high-power LED devices, then the power output is improved, but the yield of products deteriorates dramatically
Solution Approach 1:
The patent divides a large-area wafer into multiple smaller unit cells (e.g., 1mm² each) that can be independently processed and tested. This segmentation allows high-yield small chip fabrication while achieving high total power through parallel connection of multiple units on the same wafer substrate.
2Power
If a plurality of small-size LED chips are integrally assembled to obtain high-power LED device, then the power output is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent merges multiple unit cells into a single integrated wafer-level device structure where all units are processed, connected, and packaged together as one device. This eliminates the need for separate assembly of individual chips and simplifies the manufacturing process while maintaining high power output.
Solution Approach 2:
The wafer substrate serves multiple functions simultaneously: it acts as the mechanical support structure, the electrical interconnection network, and the packaging substrate. This multi-functionality reduces the number of separate components and assembly steps required.
3Power
If a plurality of small-size LED chips are integrally assembled to obtain high-power LED device, then the power output is improved, but the total cost for manufacturing increases
Solution Approach 1:
The patent performs preliminary processing of all unit cells on the wafer before final device completion. Electrical connections, testing, and packaging are established at the wafer level prior to cutting or separation, which reduces subsequent assembly costs and improves manufacturing efficiency.
Data Source
Figure 1~2
Figure 3~4a
Figure 4b
AI summary
The present invention discloses a wafer-level semiconductor device and a manufacturing method thereof. The wafer-level semiconductor device comprises a wafer-level substrate; a plurality of serial groups formed on a surface of the substrate and are disposed in parallel, each serial group comprising a plurality of parallel groups disposed in series, each parallel groups comprising a plurality of unit cells disposed in parallel, wherein each unit cell is an independent functional unit which is formed by processing a semiconductor layer directly grown on a surface of the substrate; and a lead, which is at least electrically connected between two selected parallel groups in each serial group to make ON-voltages of all the serial groups substantially consistent. The device of the present invention, with a simple structure, a simple and convenient manufacturing process, and a high efficiency to produce qualified products, can be put into large-scale production and application.