Wafer-Level LED Chip Arrays With Submount Metallization Layout

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Solution Overview

Problem

Conventional LED technologies face challenges in producing high-quality light with desired emission characteristics while accommodating multiple LED chips within a single package, requiring improved packaging arrangements and electrical connections.

Innovation Solution

Wafer level fabrication method involving LED wafers with multiple chips bonded to submount wafers having metallization patterns, allowing for electrical coupling of LED chips in various configurations and subsequent singulation into individual light-emitting devices with close spacing and flexible electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If multiple LED chips are arranged closely together within a single package, then the illumination characteristics and appearance of a single light-emitting surface are improved, but the packaging complexity and difficulty of providing suitable electrical connections increase

Engineering Contradiction:
Improveillumination characteristicsVSAvoidpackaging complexity
Core Design Contradiction:
Illumination intensityVSDevice complexity

Solution Approach 1:

The invention divides the package into modular units, each containing a submount with integrated metallization patterns and a specific arrangement of LED chips. This segmentation allows complex multi-chip arrangements to be managed as standardized modules, reducing overall packaging complexity while maintaining close chip spacing for improved illumination characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metallization patterns are pre-formed on the submount before LED chips are mounted. This preliminary action of creating the electrical connection infrastructure in advance simplifies the subsequent chip mounting process and reduces packaging complexity, while still enabling close spacing of multiple LED chips for enhanced illumination.

Inventive Principle:
Principle #10Preliminary action

2Shape

If multiple LED chips are arranged closely together within a single package, then the appearance of a single light-emitting surface is improved, but the difficulty of providing suitable electrical connections increases

Engineering Contradiction:
Improveappearance of single light-emitting surfaceVSAvoidelectrical connection complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The invention merges the electrical connection functions by integrating multiple metallization patterns (anode and cathode traces) onto a single submount. This consolidation provides suitable electrical connections for multiple closely-spaced LED chips while maintaining a simple unified package structure that preserves the appearance of a single light-emitting surface.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The submount serves as an intermediary component between the LED chips and the external electrical connections. It contains the metallization patterns that facilitate electrical coupling of multiple chips, reducing the complexity of providing suitable electrical connections while maintaining close chip spacing for improved appearance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If wafer level fabrication is used to bond LED wafers to submount wafers, then the productivity and manufacturing efficiency are improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidbonding precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The metallization patterns are pre-formed on the submount wafers before the bonding process. This preliminary preparation of the receiving substrate ensures that when LED wafers are bonded at wafer level, the electrical connections are already in place, improving manufacturing efficiency while the pre-established patterns help maintain required bonding precision through alignment features.

Inventive Principle:
Principle #10Preliminary action

4Illumination intensity

If LED chips are spaced closely together, then the illumination characteristics and appearance are improved, but the difficulty of providing suitable packaging arrangements increases

Engineering Contradiction:
Improveillumination characteristicsVSAvoidpackaging arrangement ease
Core Design Contradiction:
Illumination intensityVSEase of manufacture

Solution Approach 1:

The package is segmented into standardized submount units with pre-defined metallization patterns. This segmentation enables close spacing of LED chips to improve illumination characteristics while the modular nature of the submounts maintains ease of manufacture through standardized, repeatable packaging arrangements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the packaging parameters by integrating multiple electrical connection functions into a single submount with comprehensive metallization patterns. This parameter change allows LED chips to be spaced closely together for improved illumination while the standardized submount design maintains ease of manufacture.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of high-quality light-emitting devices with improved illumination characteristics, reduced need for complex assembly steps, and flexible electrical configurations, enhancing system efficiency and appearance of a single light-emitting surface.

Implementation Method 1

bonding the LED wafer to the frontside of the submount wafer comprises thermocompression bonding

Methodology Applied
Scientific EffectThermocompression bonding:

Implementation Method 2

bonding the LED wafer to the frontside of the submount wafer comprises eutectic bonding

Methodology Applied
Scientific EffectEutectic bonding:

Implementation Method 3

bonding the LED wafer to the frontside of the submount wafer comprises transient liquid phase bonding

Methodology Applied
Scientific EffectTransient liquid phase bonding:

Implementation Method 4

bonding the LED wafer to the frontside of the submount wafer comprises bump bonding

Methodology Applied
Scientific EffectBump bonding:

Implementation Method 5

bonding the LED wafer to the frontside of the submount wafer comprises solder paste bonding the anode contact and the cathode contact to the first metallization pattern

Methodology Applied
Scientific EffectSolder paste bonding: Soldering

Data Source

PatentUS20240047606A1Wafer level fabrication for multiple chip light-emitting devices
Publication Date: 2024.02.08 CREELED INC
  • US20240047606A1 patent drawing
  • US20240047606A1 patent drawing
  • US20240047606A1 patent drawing

AI summary

Light-emitting devices and more particularly wafer level fabrication for multiple chip light-emitting devices is disclosed. Light-emitting devices include certain LED package structures, such as LED chips, submounts, and electrical connections that are formed by wafer level fabrication before individual light-emitting devices are separated. Methods include joining LED wafers with multiple LED chips formed thereon to submount wafers that include corresponding metallization patterns, followed by separating individual light-emitting devices. Each light-emitting device includes arrays of LED chips that are already bonded to a submount with electrical connections. The arrays of LED chips may be electrically coupled in a variety of electrical configurations based on arrangements of the metallization patterns.