Wafer-Level LED Optical Electrical Testing System

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Solution Overview

Problem

Current semiconductor fabrication processes require separate tests for optical and electrical performance of LEDs, which are typically conducted after 3D packaging, leading to increased costs due to the discard of entire 3D packages when an LED fails, as other components are also scrapped.

Innovation Solution

A semiconductor test system that integrates a wafer stage, a probe test card with a light detector, and a shield structure to test LEDs for both optical and electrical parameters at the chip level, allowing for early identification and classification of LEDs before packaging, thereby reducing waste and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If optical testing is performed after 3D packaging, then the LED can be tested for optical performance, but the entire 3D package must be discarded when the LED fails, increasing manufacturing cost

Engineering Contradiction:
Improveoptical performance testingVSAvoid3D package waste
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent applies preliminary action by performing optical testing on LED wafers before the 3D packaging process. The wafer-level optical tester enables testing of multiple LEDs simultaneously at the wafer level, allowing defective LEDs to be identified and separated before packaging. This prevents the need to discard entire 3D packages when a single LED fails, directly resolving the contradiction between reliable optical testing and minimizing package waste.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If separate testing processes are used for optical and electrical performance, then each parameter can be tested independently, but the fabrication process becomes more complex and time-consuming

Engineering Contradiction:
Improveparameter testing capabilityVSAvoidfabrication process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges optical and electrical testing capabilities into a single integrated wafer-level testing system. The tester combines optical measurement units with electrical probe card functionality, allowing both types of testing to be performed simultaneously on the same wafer. This integration reduces the number of separate testing processes, simplifies the fabrication workflow, and eliminates the need for multiple separate equipment setups, thereby resolving the contradiction between comprehensive parameter testing and process complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If wafer-level testing is implemented, then multiple LEDs can be tested simultaneously improving efficiency, but the testing equipment becomes more complex

Engineering Contradiction:
Improvetesting efficiencyVSAvoidtesting equipment complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by designing a universal testing platform that can handle both optical and electrical measurements on wafers. The probe card system is configured to accommodate both optical sensors and electrical probes, allowing a single device to perform multiple testing functions. This multi-functional approach enables efficient wafer-level testing of multiple LEDs simultaneously while avoiding the need for separate specialized equipment for each test type, thus resolving the contradiction between productivity and equipment complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient testing and classification of LEDs at the wafer level, reducing manufacturing costs and increasing efficiency by identifying and discarding only defective LEDs, while packaging only qualified dies, thus optimizing the use of components and streamlining the fabrication process.

Implementation Method 1

a light detector integrated with the probe test card to collect light from a LED of the wafer

Methodology Applied
Scientific EffectLight detection: Photoelectric Effect

Data Source

PatentUS8476918B2Apparatus and method for wafer level classification of light emitting device
Publication Date: 2013.07.02 ENNOSTAR CORP
  • US8476918B2 patent drawing
  • US8476918B2 patent drawing
  • US8476918B2 patent drawing

AI summary

The present disclosure provides a semiconductor test system. The semiconductor test system includes a wafer stage to hold a wafer having a plurality of light emitting devices (LEDs); a probe test card operable to test each test field of the wafer; and a light detector integrated with the probe test card to collect light from a LED of the wafer.