Wafer-Level Molded Structure for 3D IC Package Assembly
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Solution Overview
Problem
Conventional 3D IC packaging methods using package substrates result in increased package size and inefficient heat dissipation due to the use of non-thermal conductive molding compounds, limiting the integration density and performance of semiconductor devices.
Innovation Solution
A method involving bonding top dies onto a bottom wafer, molding a first molding material between them, sawing to form molding units, and bonding these units onto a package substrate with a second molding material, which reduces package size and improves heat dissipation by eliminating the need for additional substrates and using reusable thermal materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If conventional package substrates are used for bonding dies, then the structural support and alignment are improved, but the package size increases and heat dissipation efficiency deteriorates
Solution Approach 1:
The patent extracts and eliminates the package substrate from the conventional packaging structure. Instead of bonding dies to a separate package substrate, the dies are directly bonded to each other through wafer-level bonding, removing the unnecessary substrate layer that increases package size while maintaining structural integrity through direct die-to-die bonding interfaces
Solution Approach 2:
The patent merges the functions of the package substrate and the die bonding process into a single integrated wafer-level bonding operation. The bottom wafer serves simultaneously as the structural base and the bonding substrate, eliminating the need for separate package substrates and reducing overall package volume
2Reliability
If molding compounds are used for packaging, then the protection and encapsulation are improved, but the thermal conduction capability deteriorates
Solution Approach 1:
The patent applies local quality by using different materials with different thermal conductivities in different locations. Thermal interface materials with high thermal conductivity are applied specifically at the die-to-die bonding interfaces where heat generation occurs, while standard molding compounds are used in non-critical areas for protection, thus maintaining protection while improving heat dissipation at critical locations
Solution Approach 2:
The patent employs composite material structures combining materials with different properties. Thermal interface materials with superior thermal conduction properties are combined with protective molding compounds to create a multi-layer structure that simultaneously provides protection and efficient heat dissipation pathways
3Reliability
If additional package substrates are used for die bonding, then the bonding stability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the additional package substrates from the manufacturing process, reducing material costs and simplifying the manufacturing workflow while maintaining bonding stability through direct wafer-level bonding techniques that provide sufficient mechanical and thermal stability without extra substrate layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces package size, manufacturing costs, and enhances heat dissipation capabilities, enabling more efficient integration and performance of semiconductor devices by directly bonding dies without additional substrates and utilizing reusable thermal materials.
Implementation Method 1
bonding one of the molding units onto a package substrate
Data Source
AI summary
A method of forming an integrated circuit structure is provided. In an embodiment, the method includes bonding top dies onto a bottom wafer and then molding a first molding material onto and in between the top dies and the bottom wafer. The bottom wafer, the top dies, and the first molding material are sawed to form molding units. Each of the molding units includes one of the top dies and a bottom die sawed from the bottom wafer. The molding units are bonded onto a package substrate and a second molding material is molding onto the one of the molding units and the package substrate. Thereafter, the package substrate and the second molding material are sawed to form package-molded units.


