Wafer Level Package Structure for Semiconductor Chip Protection
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Solution Overview
Problem
Conventional Wafer Level Chip Scale Packaging (WLCSP) methods fail to provide complete sealing and mechanical protection for thin semiconductor chips, leading to fragility and poor moisture resistance, while also lacking sufficient thickness for mechanical support during subsequent processing steps.
Innovation Solution
The method involves redistributing bonding pads on the semiconductor chip using a Redistribution Layer (RDL) technique, forming through holes, and filling them with conductive materials or solder, which are then connected to electrodes on the backside of the chip, allowing for precise alignment and electrical connection, and subsequent molding to provide mechanical support and protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the semiconductor chip is reduced to reduce substrate resistance and chip size, then the electrical properties are improved, but the chip becomes more fragile and prone to cracking
Solution Approach 1:
A molding compound layer is formed over the front surface of the semiconductor chip before final packaging, providing mechanical support and protection against cracking. This cushioning layer prevents the thin chip from breaking during subsequent handling and testing processes while maintaining the reduced thickness for good electrical properties.
2Reliability
If the chip is thinned to reduce substrate resistance, then electrical performance is improved, but the chip lacks sufficient thickness for mechanical support during subsequent processing
Solution Approach 1:
The molding compound acts as an intermediary layer between the thin semiconductor chip and the external environment. It provides the necessary mechanical support during manufacturing processes such as wire bonding and testing, while allowing the chip to maintain its thinned state for optimal electrical performance.
3Ease of manufacture
If conventional WLCSP methods are used with exposed chip edges, then manufacturing is simpler, but moisture resistance and mechanical protection are poor
Solution Approach 1:
The molding compound is extended to completely enclose the semiconductor chip, merging the protective function with the packaging structure. This complete encapsulation provides both moisture resistance and mechanical protection while maintaining manufacturing efficiency through a single molding process.
4Volume of moving object
If the chip is thinned for size reduction, then chip size is reduced, but the chip becomes more susceptible to damage and lacks mechanical protection
Solution Approach 1:
The molding compound forms a protective shell around the thinned semiconductor chip, providing mechanical strength and protection against damage. This shell allows the chip to maintain its small size while gaining the necessary mechanical robustness for handling and application.
Data Source
AI summary
The present invention proposes a package for semiconductor device and the fabrication method for integrally encapsulating a whole semiconductor chip within a molding compound. In the semicondcutor device package, bonding pads distributed on the top of the chip are redistributed into an array of redistributed bonding pads located in an dielectric layer by utilizing the redistribution technique. The electrodes or signal terminals on the top of the semiconductor chip are connected to an electrode metal segment on the bottom of the chip by conductive materials filled in through holes formed in a silicon substrate of a semiconductor wafer. Furthermore, the top molding portion and the bottom molding portion seal the semiconductor chip completely, thus providing optimum mechanical and electrical protections.