Wafer Level Packaging with Extended Contact Bonding Pads
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Solution Overview
Problem
Wafer level chip scale packages face issues with high impedance and low thermal conductance due to small contact areas between solder balls or bumps and PCBs, as well as lack of physical protection for chips, making them vulnerable to damage and moisture exposure.
Innovation Solution
The solution involves forming a wafer level packaging structure with larger contact bonding pads on the chip surface, extending to adjacent edges, which are electrically connected to metal bonding pads, providing increased contact area and improved thermal conduction, while also enhancing mechanical strength and protection through a thin packaging structure without lead-frames or solder materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If solder balls or bumps are directly formed on bonding pad with small volume, then device complexity is reduced, but contact area is limited resulting in high impedance and low thermal conductance
Solution Approach 1:
The patent extends the contact bonding pad from a small surface area to a larger area by utilizing the edge region of the chip in addition to the surface, effectively increasing the contact area dimensionally without significantly increasing device complexity
Solution Approach 2:
The contact bonding pad is segmented into two distinct regions: a first contact bonding pad formed on the chip surface and a second contact bonding pad extending to the edge region, allowing each segment to serve specific functions while collectively providing large contact area
2Manufacturing precision
If chip is exposed without physical protection, then manufacturing precision is maintained, but chip is easily damaged and vulnerable to moisture
Solution Approach 1:
The patent employs a thin packaging structure that provides physical protection to the chip while maintaining manufacturing precision, using thin film or shell materials that protect the chip from damage and moisture exposure without interfering with the fabrication process
3Reliability
If traditional solder materials are used for connection, then electrical connection is achieved, but negative effects from solder materials occur
Solution Approach 1:
The patent extracts or eliminates traditional solder materials from the packaging structure, replacing them with alternative materials such as metal bonding pads and interconnection structures that provide electrical connection without the negative effects associated with solder materials
Data Source
AI summary
A method to provide a wafer level package with increasing contact pad area comprising the steps of forming a first packaging layer on wafer top surface, grinding the wafer back surface and etch through holes, depositing a metal to fill the through holes and covering wafer backside, cutting through the wafer from wafer backside forming a plurality of grooves separating each chip then depositing a second packaging layer filling the grooves and covering the wafer back metal, reducing the first packaging layer thickness to expose the second packaging layer filling the grooves and forming a plurality of contact pads overlaying the first packaging layer thereafter cutting through the second packaging layer in the grooves to form individual package.