Wafer Level Packaging with Extended Contact Bonding Pads
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Solution Overview
Problem
Wafer level chip scale packages face issues with high impedance and low thermal conductance due to small contact areas between solder balls or bumps and PCBs, as well as lack of physical protection for chips, making them vulnerable to damage and moisture exposure.
Innovation Solution
The solution involves forming a wafer level packaging structure with larger contact bonding pads on the chip surface, extending to adjacent edges, which are electrically connected to metal bonding pads, providing increased contact area and improved thermal conduction, while also enhancing mechanical strength and protection through a thin packaging structure without lead-frames or solder materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If solder balls or solder bumps are directly formed on a bonding pad of a PCB, then the packaging structure is simple, but the contact area is limited resulting in high impedance and low thermal conductance
Solution Approach 1:
The patent extends the contact bonding pad from a two-dimensional surface contact to a three-dimensional structure by forming the pad that extends to adjacent edges of the chip, effectively increasing the contact footprint and dimensionality of the electrical and thermal interface
Solution Approach 2:
The contact bonding pad is segmented to extend to multiple adjacent edges of the chip, creating multiple contact zones that collectively increase the total contact area while maintaining a distributed connection pattern to the PCB
2Volume of moving object
If solder balls or solder bumps with small volume are used, then the packaging size is reduced, but the contact area is limited resulting in high impedance
Solution Approach 1:
The invention transitions from relying on the vertical height of small solder balls/bumps to utilizing the horizontal extension of contact bonding pads that reach adjacent edges, effectively moving the contact area optimization from the vertical dimension to the horizontal dimension
Solution Approach 2:
The contact bonding pad acts as an intermediary element between the chip and the PCB, providing an extended interface that improves electrical connectivity without requiring larger solder balls or bumps, thus mediating between the conflicting requirements of small packaging size and reliable electrical connection
3Device complexity
If no physical protection structure is added around the chip, then the packaging structure remains simple, but the chip is exposed and vulnerable to damage and moisture
Solution Approach 1:
The patent employs a thin packaging structure that provides physical protection for the chip while maintaining a compact form factor, effectively using a thin film-like protective layer that shields the chip from environmental harm without significantly increasing device complexity
Solution Approach 2:
The packaging structure is designed with protective features in advance to cushion and protect the chip from potential damage and moisture exposure before any harmful effects can occur, ensuring the chip is shielded from the outset
Data Source
AI summary
A method to provide a wafer level package with increasing contact pad area comprising the steps of forming a first packaging layer on wafer top surface, grinding the wafer back surface and etch through holes, depositing a metal to fill the through holes and covering wafer backside, cutting through the wafer from wafer backside forming a plurality of grooves separating each chip then depositing a second packaging layer filling the grooves and covering the wafer back metal, reducing the first packaging layer thickness to expose the second packaging layer filling the grooves and forming a plurality of contact pads overlaying the first packaging layer thereafter cutting through the second packaging layer in the grooves to form individual package.