Wafer Level Packaging With Recessed Substrates For MEMS Cavities
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Solution Overview
Problem
Conventional packaging methods for RFICs and MEMS devices require complex assembly processes and result in larger package sizes, limiting efficiency and increasing costs due to the need for air cavities around moving materials.
Innovation Solution
A semiconductor package design featuring substrates with recesses that form cavities when joined, allowing for flip-chip mounting of electronic devices and reducing overall package size through a simpler manufacturing process, including the use of flip chip bonding and recessed substrates to create a cavity for MEMS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging methods with maze structures and lids are used to create air cavities for MEMS devices, then the devices can be protected and function properly, but the package size increases and manufacturing complexity increases
Solution Approach 1:
The patent merges the cavity formation process into the substrate manufacturing step itself. Recesses are formed in the substrate during wafer fabrication using standard semiconductor processes, eliminating the need for separate maze structure creation and lid attachment steps. This combines multiple functions (protection, cavity formation, device mounting) into a unified structure.
Solution Approach 2:
The substrate is segmented into regions with recesses that form cavities. The recesses are created by removing material in specific patterns during substrate fabrication, creating discrete cavity regions that accommodate MEMS devices while maintaining structural integrity of the overall substrate.
2Reliability
If conventional packaging with maze structures and lid attachment is used, then air cavities are formed for MEMS movement, but manufacturing cost increases due to additional process steps
Solution Approach 1:
The recesses forming the cavities are created in advance during substrate manufacturing, before device assembly. This preliminary action integrates cavity formation into the standard wafer fabrication process, eliminating the need for post-assembly steps like maze patterning and lid attachment, thereby reducing manufacturing cost and complexity.
3Reliability
If conventional packaging methods are used for RFICs and MEMS, then devices can be individually packaged, but the overall package size becomes larger limiting efficiency
Solution Approach 1:
The patent merges multiple device packaging functions into a single integrated substrate structure. The recesses in the substrate create cavities that accommodate MEMS devices, while the substrate itself provides mechanical support and electrical interconnection, eliminating the need for separate packaging components and reducing overall package volume.
Data Source
AI summary
A method of packaging a semiconductor device that incorporates the formation of cavities about electronic devices during the packaging process. In one example, the device package includes a first substrate having a first recess formed therein, a second substrate having a second recess formed therein, and an electronic device mounted in the first recess. The first and second substrates are joined together with the first and second recesses substantially overlying one another so as to form a cavity around the electronic device.