Wafer Level Packaging Warpage Control via Temperature Cycles
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Solution Overview
Problem
Wafer level packaging processes often result in warpage, which impedes the formation of fine pitched redistribution layers (RDL) and reduces yields, especially in carrier-less techniques where the lack of rigidity complicates the processing and increases costs.
Innovation Solution
A method involving multiple temperature-controlled warpage correction processes, including forming vias in a polymer layer and subsequent curing, to control substrate warpage, allowing for the formation of fine pitch RDL layers with line/space of 10/10 μm or less, without the need for additional materials or expensive carrier-based processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If carrier-less techniques are used to avoid temporary bonding and debonding, then cost and time are reduced, but warpage control becomes more difficult and manufacturing precision deteriorates
Solution Approach 1:
The patent applies preliminary warpage correction processes before fine pitch RDL formation. Multiple temperature-controlled warpage correction steps are performed in advance to proactively flatten the substrate, preventing warpage from interfering with subsequent fine pitch patterning operations.
Solution Approach 2:
The patent utilizes temperature parameter changes to control warpage. By ramping to and holding specific temperatures (first temperature greater than second temperature, third temperature greater than fourth temperature) for controlled durations, the substrate's thermal expansion and contraction properties are exploited to correct warpage without requiring carrier bonding.
2Productivity
If fine pitch patterning with line/space of 10/10 μm or less is formed, then productivity for high-density interconnects is improved, but warpage control becomes more critical and manufacturing precision requirements increase
Solution Approach 1:
Multiple warpage correction processes are performed before fine pitch patterning to ensure the substrate is sufficiently flat. The patent specifies that warpage should be reduced to 500 μm or less, and preferably 400 μm or less, before attempting fine pitch RDL formation with line/space of 10/10 μm or less.
Solution Approach 2:
The patent employs multiple temperature cycles with different temperature ranges and durations to progressively correct warpage. The first warpage correction uses a first temperature greater than a second temperature, and the second warpage correction uses a third temperature greater than a fourth temperature, allowing precise control of substrate deformation to achieve the flatness required for fine pitch patterning.
3Manufacturing precision
If multiple temperature-controlled warpage correction processes are performed, then warpage control and manufacturing precision are improved, but process complexity and time increase
Solution Approach 1:
The patent systematically varies temperature parameters across multiple correction processes. The first temperature is greater than the second temperature, and the third temperature is greater than the fourth temperature. These controlled parameter changes allow progressive warpage correction while maintaining process repeatability and control.
Solution Approach 2:
The patent implements a multi-step warpage correction process where each subsequent correction builds on the previous results. The process includes determining material composition, thickness, or prior processing, then adjusting temperature and duration parameters accordingly, creating a feedback-driven approach to achieving target warpage values.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high yields for fine pitch RDL layers, achieving warpage values of 500 μm or less, and allows for cost-effective production of 2/2 μm l/s RDL layers, even in carrier-less processes, by optimizing temperature and duration parameters based on material composition and prior processing.
Implementation Method 1
heating the substrate to a first temperature over a first time period... and cooling the substrate to a second temperature over a second time period
Implementation Method 2
curing the polymer layer
Data Source
AI summary
Methods and apparatus for producing fine pitch patterning on a substrate. Warpage correction of the substrate is accomplished on a carrier or carrier-less substrate. A first warpage correction process is performed on the substrate by raising and holding a temperature of the substrate to a first temperature and cooling the carrier-less substrate to a second temperature. Further wafer level packaging processing is then performed such as forming vias in a polymer layer on the substrate. A second warpage correction process is then performed on the substrate by raising and holding a temperature of the substrate to a third temperature and cooling the substrate to a fourth temperature. With the warpage of the substrate reduced, a redistribution layer may be formed on the substrate with a 2/2 μm l/s fine pitch patterning.