Wafer-Level Phosphor Deposition for LED Color Consistency
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Solution Overview
Problem
The existing process of coating and testing LED semiconductor dies after singulation is expensive and complicated, making it difficult to achieve consistent color and light intensity output.
Innovation Solution
A system for wafer-level phosphor deposition that applies a phosphor coating and performs testing on a semiconductor wafer before singulation, using a semiconductor wafer with photo-resist posts to protect electrical contacts and a phosphor deposition layer that exposes contacts for testing and subsequent wire bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If phosphor coating and testing are performed on individual dies after singulation, then each die can be individually processed and tested, but the process becomes expensive and complicated with inconsistent die characteristics
Solution Approach 1:
The patent applies phosphor coating to the semiconductor wafer before singulation, allowing all dies to receive uniform phosphor deposition simultaneously. This preliminary action ensures consistent phosphor thickness and composition across all dies, eliminating the variability introduced by individual die processing and achieving uniform color characteristics without complex post-singulation handling
Solution Approach 2:
The patent combines multiple operations (phosphor deposition, curing, and testing) into a single wafer-level process. By keeping all dies attached to the wafer substrate, the system performs phosphor coating and characterization on the entire wafer simultaneously, merging what would otherwise be separate individual die operations into one integrated process that reduces complexity and cost
2Manufacturing precision
If phosphor coating is applied to the entire wafer surface, then all dies receive uniform coating, but electrical contacts become covered and inaccessible for testing and wire bonding
Solution Approach 1:
The patent applies different treatments to different regions of the wafer surface. Photoresist material is selectively applied only to areas where electrical contacts are located, while the rest of the wafer surface receives phosphor coating. This local differentiation allows the phosphor layer to be deposited uniformly across the entire wafer while maintaining accessibility to electrical contacts through the photoresist-masked regions
Solution Approach 2:
The patent introduces photoresist material as an intermediary layer between the phosphor coating and the electrical contacts. The photoresist serves as a temporary protective mask that prevents phosphor deposition on contact areas while allowing the rest of the wafer to be coated. After phosphor deposition, the photoresist is removed, exposing the contacts for subsequent testing and wire bonding operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the phosphor deposition process and ensures consistent operational parameters for individual LED semiconductor dies, reducing costs and complexity by enabling probing and testing of the entire wafer simultaneously.
Implementation Method 1
a phosphor deposition layer covering the semiconductor wafer and surrounding the at least one photo-resist post
Data Source
AI summary
System for wafer-level phosphor deposition. In an aspect, a semiconductor wafer is provided that includes a plurality of LED dies wherein at least one die includes an electrical contact, a photo-resist post covering the electrical contact, and a phosphor deposition layer covering the semiconductor wafer and surrounding the photo-resist post. In another aspect, a semiconductor wafer is provided that comprises a plurality of LED dies wherein at least one die comprises an electrical contact, a phosphor deposition layer covering the semiconductor wafer, and a cavity in the phosphor deposition layer exposing the at least one electrical contact.


