Wafer-Level Poling Fuse Segmentation for Electro-Optic Modulators
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Solution Overview
Problem
Existing polymer modulator technologies face challenges in achieving low-cost, compact designs with efficient component alignment and testing, while also protecting against short circuits that can disrupt the entire circuit.
Innovation Solution
The implementation of a system with a plurality of fuses connected in parallel, where each fuse is series connected to a limited number of slot modulator devices, allows for protection against short circuits by breaking the fuse connected to the shorted device, thereby maintaining current flow to other fuses and preventing circuit disruption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single high-voltage source is used to pole multiple slot modulator devices in series, then poling efficiency is improved, but the circuit becomes vulnerable to complete failure when one device shorts
Solution Approach 1:
The circuit is segmented into multiple independent parallel branches, each containing a fuse and associated slot modulator devices. When a short occurs in one branch, only that branch is affected while other branches continue to function, thus maintaining overall circuit reliability while preserving poling efficiency in unaffected devices.
Solution Approach 2:
Fuses are pre-installed in each parallel branch to provide beforehand protection against short circuits. When a short occurs, the fuse breaks to isolate the faulty branch, preventing complete circuit failure and cushioning the impact on overall system reliability.
2Reliability
If fuses are connected in series to protect against shorts, then circuit protection is improved, but current flow is interrupted for all devices when one fuse breaks
Solution Approach 1:
The circuit is divided into multiple independent parallel branches with individual fuses in each branch. When one fuse breaks due to a short, only that specific branch is disconnected while other branches remain operational, thus providing circuit protection without interrupting current flow to all devices.
Solution Approach 2:
Each parallel branch has its own fuse providing localized protection. The protection action is confined to the specific branch where the short occurs, allowing other branches to continue operating with their current flow uninterrupted, thus maintaining productivity while ensuring reliability.
3Productivity
If wafer-level poling is used to pole hundreds or thousands of devices simultaneously, then manufacturing efficiency is improved, but a single short can cause the entire wafer to fail
Solution Approach 1:
The wafer-level poling circuit is segmented into multiple parallel branches, each with its own fuse protection. This allows hundreds or thousands of devices to be poled simultaneously while isolating faults to individual branches, preventing a single short from causing complete wafer failure and maintaining manufacturing efficiency.
Solution Approach 2:
Individual fuses are pre-installed in each parallel branch of the wafer-level poling circuit to provide beforehand protection. When a short occurs during simultaneous poling of hundreds or thousands of devices, the fuse breaks to isolate the faulty branch, cushioning the impact and preventing entire wafer failure while maintaining overall manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively protects other devices and the circuit from short circuits, ensuring continuous operation of slot modulator devices without stopping, while also addressing the challenges of cost, size, and alignment efficiency.
Implementation Method 1
Since Joule heating caused by the current is proportionally related to the square of the current, the increased current will cause high Joule heating on the fuse connected to the shorted device.
Data Source
AI summary
A method of fabricating an integrated electro-optic phase modulator array is described. The method may include providing a first substrate. The first substrate may include an interconnect array. The method may include arranging an array of electro-optic phase modulators on a surface of the first substrate. Each electro-optic phase modulator may include a polymer optical stack, a semiconductor substrate, an electric input, an optical input, and/or an optical output. The interconnect array in each modulator may include an electrical interconnect, an electrical bypass, and/or an optical interconnect. The electrical interconnect may connect to a respective electrical input. The electrical bypass may connect at least a pair of adjacent modulators. The optical interconnect may connect a respective optical input and optical output. Each modulator may be series connected to a respective fuse arranged along the electric interconnect between the respective electric input and a voltage source.