Wafer-Level Semiconductor Packaging with Thermal Matching

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Solution Overview

Problem

Current packaged semiconductor chip technologies face challenges in achieving optimal thermal expansion matching and alpha-particle shielding, leading to potential reliability issues and performance degradation.

Innovation Solution

A chip-sized wafer level packaged device is developed, featuring a semiconductor wafer with a packaging layer having thermal expansion characteristics similar to the wafer, adhered using an adhesive with matching expansion properties, and incorporating a compliant layer and metal connections for electrical contact, along with alpha-particle shielding, to enhance reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a packaging layer with thermal expansion characteristics similar to the semiconductor wafer is used, then thermal matching is improved, but device complexity increases

Engineering Contradiction:
Improvethermal matchingVSAvoidpackaging structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by carefully selecting materials for the packaging layer whose thermal expansion coefficient matches that of the semiconductor wafer. This material parameter selection resolves the thermal mismatch problem without requiring complex active compensation mechanisms, thereby improving reliability while controlling device complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures where the packaging layer is formed from materials specifically chosen to match thermal expansion characteristics of the semiconductor wafer. This composite approach allows optimization of thermal matching properties while maintaining structural integrity and managing overall device complexity.

Inventive Principle:
Principle #40Composite materials

2Object-affected harmful factors

If alpha-particle shielding is provided between the ball grid array and the device, then protection against alpha particles is improved, but device complexity increases

Engineering Contradiction:
Improvealpha-particle shieldingVSAvoidpackaging structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary shielding layer between the ball grid array and the semiconductor device. This intermediate layer acts as a mediator that blocks alpha particles from reaching the sensitive device components, thereby protecting against harmful radiation effects while adding only moderate structural complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The packaging structure is segmented into distinct functional layers, including a dedicated shielding layer. This segmentation allows the shielding function to be independently optimized and integrated into the overall packaging structure, improving alpha-particle protection while managing device complexity through modular design.

Inventive Principle:
Principle #1Segmentation

3Stability of the object's composition

If a compliant layer is formed over the packaging layer and underlying the ball grid array, then stress relief is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvestress reliefVSAvoidlayer alignment
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent incorporates a compliant layer that acts as a flexible element between the rigid packaging layer and the ball grid array. This flexible film provides stress relief and accommodation for thermal expansion differences, improving structural stability while the layer is designed with sufficient thickness and material properties to tolerate reasonable manufacturing tolerances.

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides improved thermal matching and shielding, resulting in enhanced reliability and performance of semiconductor chips by minimizing stress and protecting against alpha particles, thus addressing existing challenges in chip packaging.

Implementation Method 1

the packaging layer including a material having thermal expansion characteristics similar to those of the semiconductor wafer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

the adhesive having thermal expansion characteristics similar to those of the packaging layer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 3

alpha-particle shielding is provided between the ball grid array and the device

Methodology Applied
Scientific EffectAlpha-particle shielding: Absorption (EM radiation)

Data Source

PatentUS9548254B2Packaged semiconductor chips with array
Publication Date: 2017.01.17 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US9548254B2 patent drawing
  • US9548254B2 patent drawing
  • US9548254B2 patent drawing

AI summary

A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.