Wafer-Level Stacking for Semiconductor Device Manufacturing
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Solution Overview
Problem
The existing methods for stacking semiconductor chips are time-consuming and prone to foreign matter contamination due to the need for individual alignment and cleavage, which reduces productivity and increases the likelihood of particle entry between chips.
Innovation Solution
A manufacturing method involving the formation of a modified layer with crystal distortion in semiconductor wafers using laser dicing, allowing for wafer-level stacking and simultaneous cleavage, thereby reducing alignment needs and foreign matter ingress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If individual semiconductor chips are aligned and stacked one by one, then precise alignment can be achieved, but the stacking process requires a long time and foreign matters can enter between chips
Solution Approach 1:
Multiple semiconductor wafers are stacked together in a combined state before cleavage, rather than stacking individual chips separately. This merging approach maintains alignment precision while dramatically reducing the number of stacking operations required, thereby improving productivity and preventing foreign matter contamination.
Solution Approach 2:
Alignment marks are formed on the semiconductor wafers in advance, and wafers are pre-aligned on the same plane before stacking. This preliminary alignment action ensures precise positioning is achieved before the actual stacking process, eliminating the need for time-consuming individual chip alignment during stacking.
2Manufacturing precision
If individual semiconductor chips are stacked with alignment, then proper positioning can be ensured, but the process is time-consuming and reduces productivity
Solution Approach 1:
Multiple wafers are stacked together as a combined unit rather than stacking individual chips separately. This reduces the number of stacking operations from multiple individual chip stackings to a single wafer-level stacking operation, significantly reducing time loss while maintaining positioning accuracy through pre-formed alignment marks.
Solution Approach 2:
Alignment marks are created on wafers beforehand, and wafers are pre-positioned on the same plane before stacking. This preliminary preparation ensures that when wafers are stacked, the positioning accuracy is automatically maintained without requiring time-consuming alignment adjustments during the stacking process.
3Manufacturing precision
If repeated alignment and stacking operations are performed, then proper chip positioning can be achieved, but foreign matters are likely to enter between chips
Solution Approach 1:
Multiple wafers are stacked together in a combined state before cleavage, reducing the number of times chips need to be handled and stacked individually. This merging approach minimizes exposure to foreign matters while maintaining chip positioning accuracy through alignment marks formed on the wafers.
Solution Approach 2:
Alignment marks are formed on wafers in advance, and wafers are pre-aligned on the same plane before stacking. This preliminary action ensures proper chip positioning is established before stacking, eliminating the need for repeated alignment operations that would increase exposure to foreign matter contamination.
4Productivity
If wafer-level stacking is implemented, then productivity is improved and contamination is reduced, but simultaneous cleavage of stacked wafers must be achieved
Solution Approach 1:
Modified layers are formed on the semiconductor wafers in advance through laser irradiation along dicing lines. This preliminary modification creates predetermined cleavage paths that enable simultaneous and clean separation of multiple stacked wafers, reducing the complexity of the cleavage process while maintaining high stacking efficiency.
Solution Approach 2:
Laser irradiation parameters are controlled to create modified layers with specific properties that facilitate clean cleavage. By changing the physical state of the wafer material through controlled laser heating, the cleavage process becomes simpler and more reliable, enabling simultaneous separation of multiple stacked wafers without increasing process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method significantly reduces the time required for stacking, minimizes particle contamination, and enhances the stability and yield of semiconductor devices by aligning wafers rather than individual chips, resulting in a more compact and reliable package.
Implementation Method 1
radiating laser to a dicing region of a semiconductor wafer
Implementation Method 2
forming a modified layer with distortion in semiconductor crystals in a first and a second semiconductor wafers by radiating laser to a dicing region
Data Source
AI summary
A manufacturing method of a semiconductor device according to the present embodiment includes forming a modified layer with distortion in semiconductor crystals in a first and a second semiconductor wafers by radiating laser to a dicing region of the first and second semiconductor wafers, each of the first and second semiconductor wafers including a plurality of semiconductor chips. The method also includes stacking the second semiconductor wafer on the first semiconductor wafer to be shifted in a first direction. The first direction is a direction from a first side of a first semiconductor chip of the first semiconductor wafer towards an opposite side to the first side of the first semiconductor chip. The method further includes cleaving the first and second semiconductor wafers.