Wafer-Level Semiconductor Testing With Internal Toggle Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

During wafer level testing of semiconductor devices, test pad failures can occur due to physical and electrical contact with probe pins, leading to devices being stuck in a test mode and unable to operate normally.

Innovation Solution

A wafer level test method that generates an internal test enable signal within the semiconductor device, allowing testing without relying on a test enable signal from an external tester, using a toggle detection mechanism to initiate testing and prevent electrostatic discharge-related issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a test enable signal is applied through test pads from an external tester, then testing can be performed, but test pad failure occurs due to physical and electrical contact with probe pins causing devices to be stuck in test mode

Engineering Contradiction:
Improvetesting reliabilityVSAvoidtest pad failure
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the test enable signal generation function from the external tester and relocates it inside the semiconductor device. The toggle detection circuit detects signal transitions internally and generates the test enable signal within the device, eliminating the need for external test pad contact that causes reliability issues.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The semiconductor device performs self-testing by using its own internal circuitry to detect test operation signal toggles and generate test enable signals. This self-service approach removes dependency on external testers making physical contact through test pads, thereby preventing test pad failure.

Inventive Principle:
Principle #25Self-service

2Ease of operation

If test pads are physically contacted by probe pins for signal application, then testing can be initiated, but electrostatic discharge risks increase

Engineering Contradiction:
Improvetest signal applicationVSAvoidelectrostatic discharge
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary mechanism - the toggle detection circuit - that translates ordinary test operation signal transitions into internal test enable signals. This intermediary approach allows testing to be initiated through normal signal lines rather than direct test pad contact, reducing electrostatic discharge risks.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If external tester provides test enable signal through test pads, then testing is enabled, but device becomes stuck in test mode after testing

Engineering Contradiction:
Improvetesting efficiencyVSAvoidnormal operation mode
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a dynamic test enable signal generation mechanism where the internal test enable signal is generated only temporarily in response to detected toggles of test operation signals. After testing completes and toggles stop, the internal test enable signal naturally ceases, allowing the device to transition back to normal operation mode without being permanently stuck in test mode.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11867751B2Wafer level methods of testing semiconductor devices using internally-generated test enable signals
Publication Date: 2024.01.09 SAMSUNG ELECTRONICS CO LTD
  • US11867751B2 patent drawing
  • US11867751B2 patent drawing
  • US11867751B2 patent drawing

AI summary

A wafer-level method of testing an integrated circuit (IC) device includes: (i) applying a plurality of test operation signals to a wafer containing the IC device, (ii) generating a test enable signal in response to detecting, on the wafer, a toggling of at least one of the plurality of test operation signals, and then (iii) testing at least a portion of the IC device in response to the generating the test enable signal. The generating may also include generating a test enable signal in response to detecting, on the wafer, an inactive-to-active transition of a toggle detection signal.