Wafer Leveling Detection Using Optical Signal Reflection

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Solution Overview

Problem

In semiconductor wafer fabrication, improper wafer leveling during transfer and processing leads to damage and lower yields due to factors like misaligned lift pins, contamination, and electrostatic chuck issues, which existing systems fail to adequately address.

Innovation Solution

A system and method that use a signal emitter and receiver positioned at specific angles relative to the wafer support assembly to detect wafer alignment, generating a warning indication if misalignment is detected, thereby preventing damage and ensuring proper leveling during transfer and processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If conventional robotic mechanisms are used for wafer transfer, then wafer handling can be automated, but wafer misalignment and damage occur due to improper leveling

Engineering Contradiction:
Improvewafer transfer automationVSAvoidwafer alignment accuracy
Core Design Contradiction:
Extent of automationVSReliability

Solution Approach 1:

The system performs preliminary leveling detection using optical sensors before the wafer is transferred by the robotic mechanism. The detected tilt information is used to pre-adjust the wafer support assembly, ensuring the wafer is properly leveled before handling, thus preventing misalignment and damage during automated transfer

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors wafer leveling status using optical sensors that detect the tilt angle of the wafer on the support assembly. This feedback information is fed back to the control system, which automatically adjusts the support assembly positioning to maintain proper wafer alignment throughout the transfer process

Inventive Principle:
Principle #23Feedback

2Device complexity

If wafer leveling detection is not implemented, then the system structure remains simple, but wafer damage occurs due to misalignment

Engineering Contradiction:
Improvesystem structure complexityVSAvoidwafer damage from misalignment
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The system replaces complex mechanical leveling measurement mechanisms with optical sensors that non-contactively detect wafer tilt angle. This substitution maintains simple system structure while effectively detecting wafer alignment status and preventing damage through automated optical monitoring

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If real-time wafer alignment monitoring is added, then wafer damage is prevented, but system complexity increases

Engineering Contradiction:
Improvewafer positioning accuracyVSAvoidmonitoring system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system uses the existing wafer support assembly structure itself as part of the monitoring mechanism. The optical sensors detect tilt relative to the support assembly, and the control system automatically adjusts the same support assembly to correct alignment, making the system self-regulating without requiring separate complex positioning mechanisms

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively detects and corrects wafer misalignment in real-time, reducing damage and improving yields by ensuring accurate wafer positioning throughout the fabrication process.

Implementation Method 1

A signal is transmitted from a signal emitter positioned at a predetermined transmission angle relative to an axis normal to the wafer support assembly so that the signal is reflected from the wafer

Methodology Applied
Scientific EffectReflection: Reflection

Data Source

PatentUS9368379B2Systems and methods of controlling semiconductor wafer fabrication processes
Publication Date: 2016.06.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9368379B2 patent drawing
  • US9368379B2 patent drawing
  • US9368379B2 patent drawing

AI summary

A system and method of controlling a semiconductor wafer fabrication process. The method includes positioning a semiconductor wafer on a wafer support assembly in a wafer processing module. A signal is transmitted from a signal emitter positioned at a predetermined transmission angle relative to an axis normal to the wafer support assembly to check leveling of the wafer in the module, so that the signal is reflected from the wafer. The embodiment includes monitoring for the reflected signal at a predetermined reflectance angle relative to the axis normal to the wafer support assembly at a signal receiver. A warning indication is generated if the reflected signal is not received at the signal receiver.