Wafer Coating Line Manipulator Layout for Throughput Bottlenecks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing coating and development equipment in semiconductor processing face limitations in production capacity due to the bottleneck production capacity of traditional robots, which cannot be significantly improved without increasing the number of robots, leading to larger floor areas and further capacity constraints.

Innovation Solution

The proposed coating and development equipment includes a cassette module, first and second process modules, and an interface module, with inter-layer and intra-layer process manipulators featuring end effectors that can operate independently and in parallel, allowing for simultaneous transport of multiple wafers and optimizing vertical space usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of robots is increased to improve bottleneck production capacity, then production capacity is improved, but floor area increases

Engineering Contradiction:
Improvebottleneck production capacityVSAvoidfloor area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent transitions from horizontal robot arrangement to vertical manipulator stacking, moving the system into the third dimension. Multiple manipulators are arranged vertically within the same equipment housing, allowing parallel wafer processing without increasing floor area. This dimensional change enables multiple wafers to be processed simultaneously while maintaining a compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If traditional robots are used with fixed form and limit speed, then equipment structure is simple, but production capacity is limited

Engineering Contradiction:
Improveproduction capacityVSAvoidequipment structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the wafer transport function into multiple independent manipulators, each capable of handling wafers independently. Instead of relying on a single robot, the system segments the work into parallel operations across multiple manipulators with different end effectors, enabling simultaneous processing of multiple wafers at different stages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each manipulator is equipped with multiple types of end effectors that can perform different functions (grasping, holding, transporting wafers). This multi-functionality allows a single manipulator structure to handle various wafer processing tasks, reducing the need for specialized equipment while increasing production capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If process modules are arranged in series, then equipment structure is compact, but maintenance time increases and production efficiency decreases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmaintenance time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the process flow into parallel process modules (first and second process modules) that can operate independently. Each module has its own manipulators and end effectors, allowing one module to be maintained or serviced while the other continues processing wafers, thereby reducing maintenance downtime and improving overall production efficiency.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12306537B2Coating and development equipment
Publication Date: 2025.05.20 KINGSEMI CO LTD
  • US12306537B2 patent drawing
  • US12306537B2 patent drawing
  • US12306537B2 patent drawing

AI summary

Provided in the present invention is a coating and development equipment, comprising a cassette module, a first process module, a second process module, and an interface module. A first inter-layer process manipulator, an intra-layer process manipulator group and a second inter-layer process manipulator are arranged between the first process module and the second process module, and the first inter-layer process manipulator, the second inter-layer process manipulator, and manipulators in the intra-layer process manipulator group each have two groups of end effectors facing oppositely, the number of each group of end effectors is m, and m is a natural number greater than or equal to 2, whereby the handling of a plurality of wafers can be realized and the production efficiency can be improved.