Wafer Map Analyzer Using Auto-Encoded Feature Extraction

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Solution Overview

Problem

Current wafer map analysis in semiconductor manufacturing relies heavily on manual visual recognition, leading to high personnel costs and low accuracy.

Innovation Solution

A method and system for analyzing wafer maps using auto-encoding and unsupervised learning to extract features, classify patterns, and generate representative images, reducing manual intervention and improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If manual visual recognition is used for wafer map analysis, then engineers can identify defects, but personnel costs are high and accuracy is low

Engineering Contradiction:

Improveanalysis accuracyVSAvoidmanual intervention level

Core Design Contradiction:

Measurement precisionVSExtent of automation

Solution Approach 1:

The patent replaces manual visual recognition (mechanical human analysis) with an automated machine learning system that uses neural networks and algorithms to analyze wafer maps, thereby eliminating personnel costs while improving consistency and accuracy of defect detection

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system enables self-service analysis where the machine learning model automatically processes wafer maps without human intervention, performing feature extraction, pattern recognition, and defect classification autonomously to reduce dependency on engineer expertise and manual labor

Inventive Principle:

Principle #25Self-service

2Productivity

If machine learning is used for wafer map analysis, then cost is reduced and accuracy is increased, but system complexity increases

Engineering Contradiction:

Improveanalysis efficiencyVSAvoidsystem complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the wafer map analysis process into distinct modules: feature extraction, feature grouping, representative image generation, and defect classification. Each module handles a specific aspect of the analysis, making the overall complex system more manageable and easier to implement while maintaining high productivity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transforms the complex wafer map data into a different dimensional representation by generating representative images that capture essential defect patterns. This dimensional transformation simplifies the data structure while preserving critical information, reducing system complexity without sacrificing analysis capability

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20230298154A1Wafer map analyzer, method for analyzing wafer map using the same and method for manufacturing semiconductor device

Publication Date: 2023.09.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A method for analyzing a wafer map using a wafer map analyzer includes generating first wafer maps each displaying characteristics of a first wafer for a corresponding channel of a plurality of channels. The first wafer maps are auto-encoded together to extract a first feature. The method also includes determining whether the first feature is a valid pattern, classifying the type of the first feature based on unsupervised learning when the first feature is a valid pattern and extracting a representative image of features classified into the same type as the first feature.