Wafer Map Reconstruction via Sparse Sampling and Compressed Sensing
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Solution Overview
Problem
Current semiconductor manufacturing processes require testing all dies on a wafer to generate classification maps, which is time-consuming and delays the detection of process issues, leading to reduced yields and increased waste.
Innovation Solution
A system that uses sparse sampling with a probing mask, combined with compressed sensing and convolutional neural networks, to reconstruct full wafer maps without testing all dies, allowing for earlier detection of problems and improved process control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If all dies on a wafer are tested to generate classification maps, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent extracts only the essential information needed for wafer map reconstruction by testing a sparse subset of dies rather than all dies. By selecting representative sample locations and using compressed sensing to recover the full wafer map from these limited measurements, the system achieves accurate classification maps while dramatically reducing testing time and resource consumption.
Solution Approach 2:
The patent applies partial action by performing testing on only a portion of the dies (sparse sampling) rather than the complete set. The compressed sensing algorithm enables reconstruction of the full wafer map from these partial measurements, maintaining measurement precision while reducing the amount of testing required to acceptable levels.
2Reliability
If all dies on a wafer are tested to generate classification maps, then reliability is improved, but productivity decreases
Solution Approach 1:
The system extracts critical quality information from a sparse subset of dies and uses compressed sensing to reconstruct the complete wafer map. This approach maintains reliability by accurately identifying good and bad dies through the sampled data, while simultaneously improving productivity by enabling faster wafer processing and reduced testing time.
Solution Approach 2:
The patent implements feedback mechanisms where the reconstructed wafer maps are used to provide rapid quality assessment information back to the manufacturing process. This enables real-time or near-real-time process control and decision-making, maintaining high reliability while improving overall manufacturing productivity through faster feedback loops.
3Loss of time
If sparse sampling is used to reduce testing time, then loss of time decreases, but measurement precision worsens
Solution Approach 1:
The patent introduces compressed sensing algorithms as an intermediary computational process that bridges the gap between sparse measurements and complete wafer map reconstruction. This mathematical intermediary enables the system to recover accurate classification information from limited samples, maintaining measurement precision while achieving the time savings promised by sparse sampling.
Solution Approach 2:
The system performs partial testing on a sparse subset of dies and uses advanced signal processing to recover the complete information. The compressed sensing framework ensures that even though only partial measurements are taken, the reconstruction accuracy maintains the precision needed for reliable wafer map generation.
Data Source
AI summary
A system for reconstructing wafer maps of semiconductor wafers includes: a processor; and memory having instructions stored thereon that, when executed by the processor, cause the processor to: receive test data of a wafer at sparse sampling locations of the wafer, the sparse sampling locations being selected based on a probing mask; and compute a reconstructed wafer map by performing compressed sensing with Zernike polynomials on the test data at sparse locations of the wafer.