Semiconductor Wafer Mark Formation Before Dense Metal BEOL
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Solution Overview
Problem
The difficulty in forming legible laser marks on semiconductor wafers with heavy or dense metal topmost layers in the BEOL stage, leading to unreadable marks.
Innovation Solution
A method involving the formation of a substrate with a device and peripheral region, followed by deposition of dielectric and conductive layers, and selective laser drilling in the peripheral region to create identifiable marks using laser beams that account for varying metal densities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If laser marking is performed on wafers with heavy or dense metal topmost layers, then the marking process can be completed, but the resulting marks become unreadable
Solution Approach 1:
The patent applies preliminary action by forming a mark on the wafer before the BEOL stage when dense metal layers are deposited. The mark is created on the substrate or early interconnect layers, ensuring it is established before the metal layers that would interfere with laser marking are added. This prevents the metal density from affecting mark readability while maintaining the ability to track the wafer through subsequent processing stages.
Solution Approach 2:
The patent segments the wafer processing into distinct stages: mark formation in early stages before dense metal deposition, and then subsequent metal layer addition. This temporal and spatial segmentation separates the mark creation process from the harmful metal density interference, allowing both requirements to be satisfied - the mark is formed when the substrate is still accessible to laser marking, and the metal layers are added afterward without compromising mark readability.
2Ease of manufacture
If uniform laser power is used for marking, then the process is simple, but marks become unreadable on wafers with varying metal densities
Solution Approach 1:
By performing the laser marking operation before the BEOL stage when dense metal layers are deposited, the patent eliminates the need for complex power adjustment mechanisms. The mark is created on the substrate or early interconnect layers with uniform properties, allowing simple uniform laser power to produce consistent, readable marks across all wafers regardless of the varying metal densities that will be added later.
Solution Approach 2:
The patent changes the temporal parameter of when the marking is performed rather than adjusting laser power parameters. By shifting the marking operation to an earlier stage in the manufacturing process, the patent maintains simple uniform laser power settings while achieving consistent mark readability, as the marking occurs before metal layer variations are introduced.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures clear and high-contrast laser marks are formed, facilitating easy tracking of manufacturing processes, even with dense metals, and enabling smooth progression to subsequent operations like bumping and packaging.
Implementation Method 1
removing portions of the second dielectric layer, the first dielectric layer and the interconnect structure in the peripheral region to form the mark in the peripheral region
Data Source
AI summary
The present disclosure provides a method for manufacturing a semiconductor device having a mark. The method includes: providing a substrate including a device region and a peripheral region adjacent to the device region; forming an interconnect layer over the substrate; depositing a first dielectric layer on the interconnect layer; forming a redistribution layer (RDL) over the first dielectric layer in the device region; depositing a second dielectric layer on the RDL in the device region and the first dielectric layer in the device region and the peripheral region; and removing portions of the second dielectric layer, the first dielectric layer and the interconnect structure in the peripheral region to form the mark in the peripheral region.