Wafer-on-Wafer Memory-Logic Bonding for Genomic Data Bandwidth
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Solution Overview
Problem
Current methods for manufacturing 3D integrated circuits, such as wafer-on-wafer bonding, face challenges like expensive and time-consuming alignment and bonding operations, which hinder efficient data transfer between memory and logic dies, leading to suboptimal performance in power and bandwidth.
Innovation Solution
The implementation of a wafer-on-wafer bonding process that forms high-bandwidth connections between memory and logic dies, allowing direct data transfer and reducing the need for expensive interfaces, thereby improving bandwidth and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If wafer-on-wafer bonding is used to connect memory and logic dies, then bandwidth between memory and logic is improved, but manufacturing cost and time increase due to expensive alignment and bonding operations
Solution Approach 1:
The patent applies preliminary action by performing alignment and bonding operations on complete wafers before dicing them into individual dies. This allows the alignment and bonding processes to be performed once for the entire wafer array rather than repeatedly for each die pair, significantly reducing total manufacturing time and cost while achieving high-bandwidth connections between memory and logic dies
Solution Approach 2:
The patent segments the manufacturing process into distinct stages: first bonding entire wafers together while they are still in wafer form, then dicing the bonded wafer into individual die pairs. This segmentation allows the complex alignment and bonding operations to be performed at the wafer level where they are more efficient, and separates these operations from the dicing process
2Use of energy by moving object
If traditional interfaces are used between memory and logic, then manufacturing is simpler, but power consumption increases and bandwidth is limited
Solution Approach 1:
The patent extracts the interface complexity from the individual die level and relocates it to the wafer level. By performing alignment and bonding on entire wafers before dicing, the complex interface connections are established once at the wafer level rather than requiring complex interfaces on each individual die, thereby reducing power consumption while maintaining manufacturing simplicity
Data Source
AI summary
A wafer-on-wafer formed memory and logic device can enable high bandwidth transmission of data directly between a memory die and a logic die. A logic die that is bonded to a memory die via a wafer-on-wafer bonding process can receive signals indicative of a genetic sequence from the memory die and through a wafer-on-wafer bond. The logic die can also perform a genome annotation lotic operation to attach biological information to the genetic sequence. An annotated genetic sequence can be provided as an output.