Semiconductor Wafer Metal Redistribution Layer for Bond Pad Expansion
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Solution Overview
Problem
In the semiconductor industry, process control monitoring structures in the scribe line of semiconductor wafers are often wasted during mechanical sawing due to the inability of some processes to accommodate metal structures, leading to valuable area being unused.
Innovation Solution
A metal redistribution layer is applied over the interconnect passivation of semiconductor dies, extending to cover process control monitoring structures in the edge region, allowing additional bond pads to be formed outside the active region, thereby utilizing previously wasted space for electrical connections to the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If process control monitoring structures are placed in the scribe line, then process monitoring capability is improved, but area is wasted due to mechanical sawing incompatibility
Solution Approach 1:
A metal redistribution layer is introduced as an intermediary element that bridges the process control monitoring structures in the scribe line to functional bond pads outside the scribe line. This allows the monitoring structures to remain in place for process monitoring while the metal layer extends the electrical connection to usable areas, effectively mediating between the monitoring requirement and the sawing compatibility requirement.
Solution Approach 2:
The solution extends the functionality from the two-dimensional plane of the scribe line by adding a metal redistribution layer that spans across dimensions, connecting monitoring structures in the scribe line region to bond pad regions outside the scribe line. This dimensional extension allows simultaneous achievement of process monitoring and sawing compatibility.
2Quantity of substance
If additional bond pads are provided outside the active region, then bond pad availability is improved, but area is consumed from edge region
Solution Approach 1:
The metal redistribution layer serves multiple functions simultaneously: it provides process control monitoring capability through connections to monitoring structures, creates additional bond pads for electrical connections, and utilizes the edge region area that would otherwise be wasted. This multi-functionality resolves the contradiction by making the edge region serve both monitoring and bonding purposes.
Solution Approach 2:
The solution recovers the wasted edge region area by transforming it from an unused space into a functional region containing additional bond pads. The metal redistribution layer enables this recovery by extending electrical connections into the edge region, thereby converting previously discarded area into valuable bonding area.
3Reliability
If metal structures are present in the scribe line, then process control monitoring is enabled, but mechanical sawing is compromised
Solution Approach 1:
The solution segments the functionality by separating the process control monitoring function (located in the scribe line with monitoring structures) from the electrical bonding function (located outside the scribe line with bond pads). The metal redistribution layer acts as a connector between these segmented functional regions, allowing each to operate independently without interfering with mechanical sawing.
Data Source
AI summary
A method of processing a semiconductor wafer includes forming semiconductor dies in the semiconductor wafer, each die having an active region containing devices of an integrated circuit and an edge region surrounding the active region, adjacent ones of the dies being separated by a scribe line. The method further includes forming interconnect wiring over the active region of each semiconductor die in an interlayer dielectric, forming ancillary wiring over the edge region of each die in the interlayer dielectric, forming a passivation on the interlayer dielectric, forming bond pads over the interconnect wiring of each die, the bond pads of each die being in electrical connection with the interconnect wiring of that die, and forming additional bond pads over the ancillary wiring of each semiconductor die, the additional bond pads of each die being in electrical connection with the interconnect wiring of that die.