Semiconductor Wafer Metallization via Resist Patterning

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current metallization methods for semiconductor wafers, particularly in metal wrap through (MWT) solar cells, face challenges in achieving reliable and efficient metallization of through-contact holes, especially in the side surfaces and surfaces of solar cell stacks with complex geometries and multiple subcells.

Innovation Solution

A metallization method involving the application of a resist layer using a printing method to create a precise resist pattern, followed by planar metal application and removal, allowing for simultaneous and reliable metallization of through-holes and surface areas, including the use of photolithographic fine patterning and dielectric insulation layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional screen printing or dispensing methods are used to apply metal to through-contact holes, then the metal structure can be applied directly, but the metallization reliability on side surfaces and complex geometries is insufficient

Engineering Contradiction:
Improvemetallization reliabilityVSAvoidcoating consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies a resist pattern before metal deposition to predefine the exact areas where metal should be deposited. This preliminary action ensures that the metal layer is applied only to the desired locations with high precision, solving the problem of inconsistent coating on complex geometries while maintaining metallization reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a resist pattern to create locally different properties on the wafer surface - areas covered by resist receive metal coating while exposed areas do not. This local differentiation enables precise control of metallization on through-contact holes and side surfaces, achieving both reliability and manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If physical vapor deposition is used for planar metal application, then the metal can be applied uniformly to exposed regions, but the process is time-consuming and reduces productivity

Engineering Contradiction:
Improvemetal application uniformityVSAvoidmetallization process efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The resist pattern is applied in advance to mask areas that should not receive metal coating. This preliminary masking allows subsequent metal deposition to be performed more efficiently since the resist already defines the pattern, reducing the time required for precise metal application while maintaining uniformity on exposed regions.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If through-contact holes are produced using laser or wet chemical etching, then the holes can be created in the substrate, but the etch rates differ significantly for different III-V materials used in the solar cell stack

Engineering Contradiction:
Improvethrough-hole productionVSAvoidetch rate consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent employs a dual-side resist application method where resist is applied to both the top and bottom surfaces of the wafer. This approach changes the process parameters to accommodate varying etch rates of different III-V materials, allowing through-holes to be created accurately despite material-specific etch rate differences by controlling the etching from both sides simultaneously.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If the substrate layer is thinned before hole opening, then the through-holes can be opened more easily, but passivation and metallization of the front side must be carried out before thinning which complicates the process sequence

Engineering Contradiction:
Improvehole opening easeVSAvoidprocess sequence complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies resist patterns to both the top and bottom surfaces before through-hole formation. This preliminary dual-side patterning enables subsequent through-hole etching to proceed without requiring substrate thinning, as the resist masks protect the surfaces during etching. This approach simplifies the overall process sequence by eliminating the thinning step while maintaining ease of hole opening.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables economical and reliable metallization of through-holes and surface areas, producing fine structures and ensuring consistent coating of side surfaces, enhancing the metallization process efficiency and precision.

Implementation Method 1

applying a resist layer in certain areas as a resist pattern by means of a printing method to the top side or to the bottom side of the semiconductor wafer or both to the top side and the bottom side of the semiconductor wafer

Methodology Applied
Scientific EffectPrinting method: 3D Printing

Implementation Method 2

the metal is applied in a planar manner, e.g., by means of physical vapor deposition

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

After the application of the photoresist layer and before the application of the metal layer, the photoresist layer can be finely patterned by means of a photolithographic method

Methodology Applied
Scientific EffectPhotolithographic fine patterning: Photography

Data Source

PatentUS20210066518A1Metallization method for a semiconductor wafer
Publication Date: 2021.03.04 AZUR SPACE SOLAR POWER
  • US20210066518A1 patent drawing
  • US20210066518A1 patent drawing
  • US20210066518A1 patent drawing

AI summary

A metallization method for a semiconductor wafer having at least the steps: providing a semiconductor wafer having a top side and a bottom side and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming the bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section, applying a photoresist layer in certain areas as a resist pattern by means of a printing method to the top side and/or to bottom side of the semiconductor wafer, applying a metal layer in a planar manner to exposed regions of the surface of the semiconductor wafer.