Wafer Microchips with Faraday Cages and Siped Compartments

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Solution Overview

Problem

The challenges of wafer-scale integration include inherent flaws in semiconductor wafers and thermal expansion issues between microelectronic components and circuit boards, leading to connector damage and failed attempts at developing supercomputers using this technology.

Innovation Solution

The integration of Faraday Cages and siped compartments, allowing for independent operation of wafer microchips with wireless or optical connections, reducing the need for pins and handling of flawed microchips, and using stacked wafers with similar expansion rates to mitigate thermal expansion problems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If semiconductor wafers are used with inherent flaws, then manufacturing cost is reduced, but system reliability deteriorates

Engineering Contradiction:
Improvemanufacturing costVSAvoidsystem reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The wafer is divided into multiple independent microchip compartments, each capable of independent operation. This segmentation allows flawed microchips to be isolated and ignored while others continue to function, resolving the contradiction between using imperfect wafers and maintaining system reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the operational parameter from requiring all microchips to function to allowing independent operation of individual microchips. This parameter change enables the system to tolerate flaws in some microchips while maintaining overall functionality and reliability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional pin connections are used between microelectronic components and circuit boards, then electrical connectivity is achieved, but thermal expansion damage occurs

Engineering Contradiction:
Improveconnector reliabilityVSAvoidthermal expansion damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The invention replaces the mechanical pin connection system with wireless or optical communication systems. This substitution eliminates the mechanical stress and thermal expansion damage associated with physical connectors while maintaining electrical connectivity functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention introduces wireless signals or optical beams as intermediaries to transfer information and power between microelectronic components and circuit boards, replacing direct mechanical contact and eliminating thermal expansion-related connector damage

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If elaborate handling procedures are implemented for flawed microchips, then defect management is improved, but device complexity increases

Engineering Contradiction:
Improvedefect managementVSAvoidhandling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By segmenting the wafer into independent microchip compartments, the invention simplifies defect management. Each microchip can be independently evaluated and activated or deactivated based on its functionality, eliminating the need for elaborate handling procedures while maintaining reliable defect management

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system automatically identifies and isolates flawed microchips through independent operation capability, eliminating the need for complex external handling procedures. Each microchip essentially manages its own operational status, reducing overall system complexity

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables wafer-scale integration by allowing flawed microchips to be ignored, reducing the need for elaborate handling and minimizing thermal expansion issues, thus facilitating the creation of reliable and efficient semiconductor systems.

Implementation Method 1

Devices with faraday cages and internal flexibility sipes

Methodology Applied
Scientific EffectFaraday Cage: Faraday Cage

Data Source

PatentUS8378474B2Devices with faraday cages and internal flexibility sipes
Publication Date: 2013.02.19 FRAMPTON E ELLIS
  • US8378474B2 patent drawing
  • US8378474B2 patent drawing
  • US8378474B2 patent drawing

AI summary

A computer or microchip comprising an outer chamber and at least one inner chamber inside the outer chamber. The outer chamber and the inner chamber being separated at least in part by an internal sipe, and at least a portion of a surface of the outer chamber forming at least a portion of a surface of the internal sipe. The internal sipe has opposing surfaces that are separate from each other and therefore can move relative to each other, and at least a portion of the opposing surfaces are in contact with each other in a unloaded condition. The outer chamber including a Faraday Cage. A computer, comprising a semiconductor wafer having a multitude of microchips. The multitude of microchips forming a plurality of independently functioning computers, each computer having independent communication capabilities.