Semiconductor Wafer Nanotopography Estimation via Sliced Surface Profile
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Solution Overview
Problem
Current methods for evaluating nanotopography of semiconductor wafers require polishing, limiting early-stage evaluation and efficiency in manufacturing processes, as parameters measured before polishing do not correlate with post-polished surface conditions.
Innovation Solution
A method and apparatus for evaluating nanotopography by measuring the surface profile of sliced wafers, determining the maximum inclination value of warp change, and estimating the polished surface nanotopography based on this measurement, using techniques like atomic force microscopy or contact probe methods, allowing for early-stage evaluation and adjustment of slicing conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If nanotopography is measured using optical methods after polishing, then measurement accuracy is improved, but manufacturing time and process complexity increase
Solution Approach 1:
The patent measures surface profile parameters (warpage, warp, convex-concave amounts) at the as-cut stage before polishing, rather than after polishing. This preliminary measurement allows early evaluation and adjustment of slicing conditions, eliminating the need for time-consuming post-polishing nanotopography measurements while maintaining measurement accuracy through proper parameter selection.
Solution Approach 2:
The patent replaces optical measurement methods (which require mirror surfaces and complex equipment) with mechanical/contact-based surface profile measurement methods. This substitution enables measurements to be performed on as-cut wafers without requiring polished surfaces, significantly reducing measurement time and process complexity while maintaining adequate measurement accuracy for process control.
2Productivity
If conventional surface profile parameters are used to evaluate as-cut wafers, then early-stage evaluation is enabled, but correlation with post-polished nanotopography is lost
Solution Approach 1:
The patent identifies and uses specific surface profile parameters (warpage, warp, convex-concave amounts) that have been proven to correlate with post-polished nanotopography. By changing from conventional evaluation parameters to these specific parameters, the patent maintains early-stage evaluation capability while preserving the critical information needed to predict final nanotopography quality.
Solution Approach 2:
The patent establishes a feedback mechanism where as-cut surface profile measurements provide information about expected post-polished nanotopography. This feedback loop allows slicing conditions to be adjusted based on measured parameters, ensuring that wafers meeting nanotopography specifications are produced without requiring post-polishing verification, thus maintaining both productivity and information correlation.
3Ease of manufacture
If slicing conditions are adjusted without early evaluation, then process simplicity is maintained, but nanotopography quality control deteriorates
Solution Approach 1:
The patent performs surface profile measurement and evaluation at the as-cut stage before polishing, enabling preliminary assessment of nanotopography potential. This early evaluation allows slicing conditions to be adjusted proactively to ensure good nanotopography outcomes, maintaining process simplicity by avoiding complex post-polishing corrections while ensuring manufacturing precision through targeted parameter control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate estimation of nanotopography before polishing, improving wafer manufacturing efficiency by allowing swift control of slicing conditions and reducing defective wafers, thus increasing productivity and ensuring good nanotopography levels in polished wafers.
Implementation Method 1
These apparatus are optical types and the nanotopography is measured by using surface reflection of an object to be measured
Data Source
AI summary
The present invention provides a method for evaluating nanotopography of a surface of a semiconductor wafer sliced from a semiconductor ingot, the method being conducted prior to polishing of the surface, the method at least comprising: measuring a surface profile of the wafer in the direction that the wafer is sliced; determining a maximum inclination value of warp change of the wafer surface in a sectional profile in the direction that the wafer is sliced of the measured surface profile; and estimating nanotopography of the wafer surface after being polished based on the determined maximum value. As a result, there are provided a method and an apparatus for evaluating nanotopography of a surface of a semiconductor wafer, and a method for manufacturing a semiconductor wafer exhibiting good nanotopography level on the surface.