Photolithography Overlay Alignment Simulation for Semiconductor Wafer Manufacturing

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Solution Overview

Problem

In automated semiconductor wafer manufacturing, leading lots often require frequent mask changes and human intervention to correct overlay misalignment, leading to inefficiencies and increased production time due to the lack of recorded overlay alignment values, which complicates process adjustments based on past experiences.

Innovation Solution

A system with a smart overlay control database and simulation module that determines simulated overlay alignment for photolithography tools, selecting algorithms to align leading lots within specifications, and dispatching wafers to appropriate tools based on empirical alignment data, allowing for automated alignment and reduced rework.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If frequent mask changes are implemented to correct overlay misalignment, then overlay precision is improved, but device complexity and operation time increase

Engineering Contradiction:
Improveoverlay alignmentVSAvoidmask change frequency
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The system performs preliminary simulation of overlay alignment using empirical data from the SOC database before actual wafer processing. Multiple algorithms are simulated in advance to predict which will achieve the best alignment, allowing the system to pre-determine the optimal mask and tool combination without needing frequent mask changes during production

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by recording actual overlay alignment values from processed wafers and storing them in the SOC database. This historical data is continuously used to refine and update the empirical alignment data, improving the accuracy of future simulations and reducing the need for corrective mask changes

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If human supervisors manually arrange lots according to tool usage, then overlay alignment is improved, but productivity decreases

Engineering Contradiction:
Improveoverlay alignmentVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The system performs self-service by automatically selecting the optimal algorithm and dispatching wafers to appropriate tools based on simulated overlay alignment predictions. The dispatch module autonomously manages lot arrangement without human intervention, using the simulation results to determine the best tool-wafer-mask combinations

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system replaces manual human supervision with an automated computational system that uses empirical data and simulation algorithms to make dispatch decisions. The smart overlay control database and simulation module substitute for human judgment, automating the previously manual process of lot arrangement and tool assignment

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If wafers are confined to a single tool to avoid leading lot problems, then overlay alignment is improved, but device complexity and production time increase

Engineering Contradiction:
Improveoverlay alignmentVSAvoidwafer tool flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The system changes the parameter of tool selection by using simulation to predict overlay alignment for multiple different tool-wafer-mask combinations. Instead of confining wafers to a single tool, the system evaluates multiple options and selects the optimal combination based on simulated performance, enabling flexible wafer dispatch across different tools

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8825191B2System and method for improved automated semiconductor wafer manufacturing
Publication Date: 2014.09.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8825191B2 patent drawing
  • US8825191B2 patent drawing
  • US8825191B2 patent drawing

AI summary

A method for aligning a photolithographic machine in an automated semiconductor manufacturing system is provided. The method may include identifying a maximum precision degree for a wafer and identifying a maximum overlay correction value. The method may simulate one or more algorithms to determine whether an algorithm aligns a leading lot within alignment specifications. The method may align a photolithography machine using an algorithm selected based on the simulations.