Semiconductor Wafer Overlay Error Characterization
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Solution Overview
Problem
Traditional methods for characterizing in-plane displacement (IPD) in semiconductor fabrication, particularly when both frontside and backside films are subjected to film force/stress changes, are inadequate as they fail to account for residual stresses, leading to degraded accuracy in overlay error estimation.
Innovation Solution
A system and method that includes a controller performing multiple characterization processes using interferometer and reflection-mode characterization tools before and after lithography and film deposition processes, allowing for the determination of film force and in-plane displacements, which are then fed back into the fabrication process to improve accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional two-characterization approach is used, then process simplicity is maintained, but overlay error estimation accuracy deteriorates when concurrent frontside and backside film processes are involved
Solution Approach 1:
The patent segments the film deposition process into discrete frontside film processes and discrete backside film processes, allowing independent characterization of each. By treating frontside and backside films separately and characterizing them at different stages (before backside deposition for frontside, after backside deposition for backside), the system can accurately account for residual stresses from concurrent processes without requiring a completely complex new measurement approach.
Solution Approach 2:
The patent performs preliminary characterization of frontside films before backside film deposition occurs. This preliminary action captures the initial state and residual stresses of frontside films, which are then used in conjunction with backside film characterization data to accurately calculate total overlay errors, improving measurement precision while maintaining reasonable process complexity.
2Device complexity
If traditional wafer geometry characterization is performed, then manufacturing complexity is reduced, but the ability to account for residual backside film changes to frontside film processes is lost
Solution Approach 1:
The patent divides the characterization system into separate frontside and backside measurement paths. Frontside wafer geometry is characterized using traditional methods before backside deposition, while backside film properties are characterized separately after deposition. This segmentation allows the system to account for residual stresses from both sides independently, improving reliability without requiring a single overly complex characterization system.
Solution Approach 2:
The patent introduces an intermediary computational model that combines characterization data from both frontside and backside processes. This intermediary layer processes the separate measurements and calculates the total overlay error by accounting for residual stress interactions, thereby improving reliability without directly increasing the complexity of the physical characterization hardware.
3Measurement precision
If multiple discrete characterization processes are implemented, then film force and in-plane displacement accuracy improve, but process time increases
Solution Approach 1:
The patent merges the characterization of frontside and backside films into a unified overlay error calculation framework. By combining the discrete characterization data from both sides using a integrated computational model, the system achieves accurate film force and in-plane displacement measurements without requiring sequential execution of completely separate measurement campaigns, thereby reducing total process time.
Solution Approach 2:
The patent performs preliminary characterization of frontside films before backside deposition, capturing data that would otherwise require re-measurement. This preliminary action eliminates the need for redundant measurements later in the process, improving measurement precision while reducing the total time required for complete characterization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the accuracy of overlay error estimation by accounting for concurrent changes in film force/stress on both frontside and backside films, improving the precision of semiconductor device production.
Implementation Method 1
at least one characterization process via at least one reflection-mode characterization tool of the one or more characterization sub-systems
Implementation Method 2
a first wafer geometry characterization process via at least one tool of one or more characterization sub-systems
Data Source
AI summary
A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.