Wafer-Level Package Interconnect Using Stand-Off Eutectic Bonding
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Solution Overview
Problem
Microelectromechanical systems (MEMS) devices face electrical failures due to their small size and complex manufacturing processes, particularly in forming reliable electrical interconnections using through-silicon via (TSV), which is costly and intricate.
Innovation Solution
A wafer level package is developed with a first and second substrate, insulating stand-off structures, and a bonding layer comprising a eutectic alloy, enabling electrical connection between lateral connection lines on both substrates without the need for additional lithography or etching processes, using micro-rings to confine the bonding layer and enhance bonding quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon via (TSV) is used to form electrical interconnection, then electrical connection reliability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent divides the electrical interconnection structure into segments: lateral connection lines on separate substrates connected through stand-off structures with bonding layers. This segmentation avoids the need for complex through-silicon via processes while maintaining reliable electrical connections between substrates.
Solution Approach 2:
The stand-off structures with bonding layers serve as intermediary elements that facilitate electrical connection between lateral connection lines on different substrates. This intermediary approach replaces the direct through-silicon via method, simplifying manufacturing while ensuring connection reliability.
2Manufacturing precision
If additional lithography or etching processes are used to create electrical interconnection structures, then connection precision is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The lateral connection lines and stand-off structures are formed preliminarily on the substrates before bonding. This preliminary formation of connection structures eliminates the need for additional lithography or etching steps after substrate bonding, maintaining precision while reducing manufacturing complexity.
Solution Approach 2:
The bonding process itself serves multiple functions: it joins the substrates together while simultaneously creating the electrical interconnection through the stand-off structures. This self-service approach eliminates the need for separate connection formation processes, reducing manufacturing steps while ensuring precise connections.
3Ease of manufacture
If bonding layer is not confined, then bonding process is simpler, but misalignment and voids increase reducing bonding quality
Solution Approach 1:
The bonding layer is confined locally within micro-rings at specific bonding locations. This localized confinement ensures precise alignment and prevents void formation only where needed, while maintaining simplicity in other areas of the bonding process. The micro-rings provide local structural definition without complicating the overall bonding procedure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides a simple, cost-effective, and reliable electrical interconnection, increasing the process window and reducing misalignment and voids, thus improving bonding quality and reducing manufacturing complexity.
Implementation Method 1
The bonding layer comprises a eutectic alloy. Bonding the first bonding material layer with the second lateral electrical connection line is provided by eutectic bonding.
Data Source
AI summary
According to an example aspect of the present invention, there is provided a wafer level package (100) for a device, the package (100) comprising a first substrate (102) and a second substrate (103), at least one insulating stand-off structure (104) between the first substrate (102) and the second substrate (103), a bonding layer (108) on the at least one stand-off structure (104), and a first lateral electrical connection line (109) on a surface of the first substrate (102) and a second lateral electrical connection line (110) on a surface the second substrate (103), wherein electrical connection is formed between the first lateral electrical connection line (109) and the second lateral connection line (110) via the bonding layer (108) of the at least one stand-off structure (104).