Semiconductor Wafer Pairing via Grid Matching Rate Calculation

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Solution Overview

Problem

Current substrate bonding techniques lack accurate alignment between shot regions of semiconductor substrates during lamination, leading to misalignment issues that affect the quality of semiconductor devices.

Innovation Solution

A substrate bonding apparatus with a controller that calculates grid matching rates between semiconductor wafers, generates pairing information for substrates with matching rates within a predetermined range, and adjusts the positioning of substrates using drive mechanisms to improve alignment accuracy during lamination bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If substrate bonding is performed without cutting and dividing semiconductor substrates, then productivity is improved by obtaining multilayer semiconductor devices, but manufacturing precision deteriorates due to misalignment between shot regions of bonded substrates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidalignment accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The system performs preliminary measurement of grid positions on semiconductor substrates before bonding, calculates matching rates for all possible substrate pairs in advance, and stores pairing information. This preliminary action enables the selection of optimally aligned substrate pairs, ensuring high manufacturing precision while maintaining the productivity benefits of substrate bonding without cutting.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If substrate pairing is performed without calculating grid matching rates, then device complexity is reduced by simplifying the bonding process, but manufacturing precision deteriorates due to inability to select optimally aligned substrate pairs

Engineering Contradiction:
Improveprocess complexityVSAvoidalignment accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The system automatically measures grid positions, calculates matching rates, determines optimal substrate pairs, and controls the bonding process without requiring manual intervention. The controller performs all calculations and selections autonomously, which increases manufacturing precision through systematic grid matching while keeping the operational complexity manageable through automation.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If grid matching rate calculation is performed for all substrate combinations, then manufacturing precision is improved by selecting optimally aligned pairs, but loss of time increases due to extensive calculations

Engineering Contradiction:
Improvealignment accuracyVSAvoidcalculation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The system calculates grid matching rates for all substrate combinations in advance, before the actual bonding process, and stores the pairing information. This preliminary calculation allows for rapid selection of optimally aligned substrate pairs during production, ensuring high manufacturing precision while minimizing time loss during the bonding operation itself.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11148938B2Substrate bonding apparatus, substrate pairing apparatus, and semiconductor device manufacturing method
Publication Date: 2021.10.19 KIOXIA CORP
  • US11148938B2 patent drawing
  • US11148938B2 patent drawing
  • US11148938B2 patent drawing

AI summary

According to one embodiment, a controller is configured to calculate a matching rate of grid shapes between each semiconductor wafer of a first semiconductor wafer group and each semiconductor wafer of a second semiconductor wafer group, and generate pairing information, into which combinations of semiconductor wafers used in calculation of matching rates are registered when the matching rates fall within a predetermined range. Further, the controller is configured to select a first semiconductor wafer to be held by a first semiconductor wafer holder from the first semiconductor wafer group, and select a second semiconductor wafer from semiconductor wafers of the second semiconductor wafer group, which are paired with the first semiconductor wafer, with reference to the pairing information.