Semiconductor Wafer Void Suppression via Palladium Interlayer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for forming UBM (Under Bump Metallurgy) using electroless plating in semiconductor wafers often result in voids at the interface between the passivation film and the electrolessly-plated nickel film, which affects solder wettability and wire bonding performance, and require additional steps like masking film formation to prevent voids.
Innovation Solution
A semiconductor wafer configuration with a passivation film, an electrode pad, and electrolessly-plated nickel, palladium, and gold films, where the electrolessly-plated gold film is formed using a displacement gold plating liquid with low reactivity to prevent voids, and the entire surface of the electrode pad is covered with the nickel film, ensuring reliable bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the electrolessly-plated nickel film is formed to cover part of the passivation film surface, then the nickel film can be formed on the electrode pad, but voids are generated at the interface between the passivation film and the nickel film
Solution Approach 1:
The patent introduces an electrolessly-plated palladium film as an intermediary layer between the electrolessly-plated nickel film and the passivation film. This intermediate layer prevents direct contact between the nickel film and passivation film, thereby eliminating the interface where voids would form, while still allowing the nickel film to cover the entire electrode pad surface for reliable bonding.
2Reliability
If a masking film is formed to prevent void generation, then voids are suppressed, but the number of production steps increases
Solution Approach 1:
The electrolessly-plated palladium film serves a dual function: it acts as both the UBM (under bump metallurgy) layer for bonding and as a barrier layer that prevents void formation at the interface. This self-service approach eliminates the need for separate masking films or additional void-prevention steps, reducing the total number of production steps while maintaining reliability.
3Stability of the object's composition
If Ni/Pd/Au films are formed to provide barrier layer, then Ni diffusion is prevented, but voids are easily generated at the interface
Solution Approach 1:
The electrolessly-plated palladium film functions as the barrier layer that prevents nickel diffusion, while its position as an intermediate layer between the nickel film and passivation film simultaneously prevents void formation. The key is that the palladium layer completely covers the nickel film, creating a seamless barrier that eliminates interface gaps where voids would otherwise form.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively inhibits void generation at the interface between the passivation film and the nickel film, improving the reliability and solder bonding strength by ensuring the entire surface of the electrode pad is covered with the nickel film, thus enhancing the semiconductor wafer's performance.
Implementation Method 1
an electrolessly-plated nickel film formed on the electrode pad, an electrolessly-plated palladium film formed on the electrolessly-plated nickel film, and an electrolessly-plated gold film formed on the electrolessly-plated palladium film
Implementation Method 2
forming an electrolessly-plated displacement gold film and forming an electrolessly-plated reduction gold film
Data Source
AI summary
A semiconductor wafer suppressed in voids produced in the interface between a passivation film and an electroless nickel plating film, and configured such that an electrode pad is entirely covered by the electroless nickel plating film. The semiconductor wafer includes, on a substrate, an electrode pad and a passivation film covering the upper surface of the substrate and an opening from which the electrode pad is exposed. The semiconductor wafer sequentially includes, on the electrode pad, an electroless nickel plating film, an electroless palladium plating film and an electroless gold plating film. A void, present in the interface between the passivation film and the electroless nickel plating film, has a length from the forefront of the void to the surface of the electrode pad of 0.3 μm or more and a width of 0.2 μm or less. The electrode pad is entirely covered by the electroless nickel plating film.