Wafer-Level Pattern Structure With Vacancy Blocking for Reliable Packaging

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Ensuring the quality of patterns and process simplicity in wafer level packaging of semiconductor devices is a challenge in the manufacturing of semiconductor devices and integrated circuits.

Innovation Solution

A method involving the formation of patterns with a vacancy migration blocking layer sandwiched between conductive layers to prevent vacancies from forming voids at interfaces, enhancing the reliability of connections in the packaging process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional pattern forming methods are used in wafer level packaging, then process simplicity is maintained, but connection reliability deteriorates due to vacancy migration forming voids at interfaces

Engineering Contradiction:

Improveconnection reliabilityVSAvoidpattern structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

A vacancy migration blocking layer is introduced as an intermediary between the first conductive layer and the second conductive layer. This blocking layer prevents vacancies from migrating and forming voids at the conductive layer interfaces, thereby improving connection reliability without fundamentally changing the conventional pattern forming approach

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The pattern structure is transformed into a composite material system by incorporating the vacancy migration blocking layer with specific material properties (low vacancy concentration, appropriate crystal structure) between the conductive layers. This composite structure combines the electrical conductivity of metal layers with the vacancy-blocking properties of specific materials

Inventive Principle:

Principle #40Composite materials

2Reliability

If additional vacancy migration blocking layer is added to prevent void formation, then connection reliability is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveconnection reliabilityVSAvoidpattern forming ease

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The vacancy migration blocking layer is formed preliminarily between the conductive layers during the pattern forming process. By preparing this blocking layer in advance as part of the pattern structure, the patent prevents vacancy migration issues before they can cause void formation, maintaining manufacturing efficiency

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent controls specific parameters of the vacancy migration blocking layer including its thickness (50-500 nm), material composition, and crystal structure to optimize both its vacancy-blocking performance and compatibility with existing manufacturing processes. These parameter optimizations ensure the layer can be integrated without significantly increasing manufacturing complexity

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250210564A1Method of forming patterns, package, and manufacturing method of package

Publication Date: 2025.06.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of forming patterns includes at least the following steps. A first dielectric layer having a first opening is provided. A first seed layer and a first conductive layer are deposited in the first opening. A portion of the first conductive layer is removed to form a recess. A vacancy migration blocking layer and a second conductive layer are deposited in the recess such that the first seed layer, the first conductive layer, the vacancy migration blocking layer, and the second conductive layer form a first pattern.