Wafer-Level Photonic-Electronic Stacking for Shorter Interconnects

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Solution Overview

Problem

Existing optic device structures face challenges with increased power consumption and heat generation due to long lead wires connecting optical engines and switches, which are separately mounted on substrates, hindering bandwidth density and efficiency improvements.

Innovation Solution

A wafer-level stack structure is implemented where electronic ICs, photonic ICs, and high-performance computing ICs are vertically aligned and bonded without separate cutting into dies, reducing wire connections and integrating them at the wafer level to form optical engines, with heat dissipation features like deep optical signal openings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If optical engines and switches are separately mounted on substrates and connected by long lead wires, then device assembly is simplified, but power consumption increases and heat generation increases

Engineering Contradiction:
Improvedevice assemblyVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent merges the optical engine and switch onto a single substrate, eliminating the need for long lead wires connecting separate components. This integration directly reduces power consumption and heat generation while maintaining manufacturing feasibility through co-packaging technology.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a planar arrangement with long lead wires to a three-dimensional stacked architecture where optical engines and switches are vertically integrated. This dimensional change dramatically shortens connection paths, reducing resistance and associated power losses.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If optical engines and switches are separately mounted on substrates and connected by long lead wires, then device assembly is simplified, but heat generation increases

Engineering Contradiction:
Improvedevice assemblyVSAvoidheat generation
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent merges the optical engine and switch onto a single substrate, eliminating the need for long lead wires connecting separate components. This integration directly reduces power consumption and heat generation while maintaining manufacturing feasibility through co-packaging technology.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent addresses heat generation by integrating components to minimize resistive heating from lead wires, and by strategically positioning heat-generating elements near heat dissipation structures, converting potential thermal problems into manageable thermal design opportunities.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If miniaturization continues to meet bandwidth density demand, then bandwidth density increases, but power consumption and heat generation continue to pose challenges

Engineering Contradiction:
Improvebandwidth densityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent transitions from a planar arrangement with long lead wires to a three-dimensional stacked architecture where optical engines and switches are vertically integrated. This dimensional change dramatically shortens connection paths, reducing resistance and associated power losses while enabling higher bandwidth density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges the optical engine and switch onto a single substrate, eliminating the need for long lead wires connecting separate components. This integration directly reduces power consumption and heat generation while maintaining manufacturing feasibility through co-packaging technology.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If miniaturization continues to meet bandwidth density demand, then bandwidth density increases, but heat generation continues to pose challenges

Engineering Contradiction:
Improvebandwidth densityVSAvoidheat generation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent transitions from a planar arrangement with long lead wires to a three-dimensional stacked architecture where optical engines and switches are vertically integrated. This dimensional change dramatically shortens connection paths, reducing resistance and associated power losses.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent addresses heat generation by integrating components to minimize resistive heating from lead wires, and by strategically positioning heat-generating elements near heat dissipation structures, converting potential thermal problems into manageable thermal design opportunities.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20250364495A1Multi-wafer integration
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250364495A1 patent drawing
  • US20250364495A1 patent drawing
  • US20250364495A1 patent drawing

AI summary

Semiconductor devices and methods of forming the same are provided. A method according to the present disclosure includes forming a first wafer including a plurality of electronic integrated circuits (EICs), forming a second wafer including a plurality of photonic integrated circuits (PICs), bonding the first wafer to the second wafer to form a first stacked wafer. The bonding of the first wafer to the second wafer includes vertically aligning each of the plurality of the EICs with one of the plurality of the PICS.