Semiconductor Wafer Planarization via Segmented Cutting and Polishing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for planarizing insulating films on semiconductor wafers, such as chemical mechanical polishing (CMP) and cutting with a bit, are inefficient in reducing processing time and cost while maintaining surface flatness, especially when dealing with low dielectric constant films and multilayer structures.
Innovation Solution
A semiconductor wafer processing method that involves holding the wafer to expose the front side, using a cutting device with a rotating member and adjustable cutting member to cut and then polish the additional layer, allowing for efficient removal of material and improved surface flatness through a combination of cutting and polishing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the insulating film is planarized by CMP method, then the surface flatness is improved, but the processing time and cost are increased
Solution Approach 1:
The planarization process is segmented into two distinct steps: cutting (material removal) and polishing (surface finishing). The cutting step removes the majority of the insulating film thickness efficiently, while the polishing step achieves the required surface flatness. This segmentation allows each step to be optimized independently, reducing overall processing time while maintaining quality.
Solution Approach 2:
The cutting and polishing steps are performed in continuous sequence without interruption, maintaining productive action throughout the process. The wafer is held in the same positioning system for both operations, eliminating repositioning time and ensuring continuous material removal followed immediately by surface finishing.
2Manufacturing precision
If the insulating film is planarized by CMP method, then the surface flatness is improved, but the processing cost is increased
Solution Approach 1:
The process is divided into cutting and polishing phases, where the expensive polishing operation is applied only to the final surface finishing rather than removing the entire film thickness. The majority of material removal is accomplished through cutting, which is more cost-effective, thereby reducing overall processing cost while maintaining surface flatness requirements.
3Ease of manufacture
If the insulating film is cut by using a bit, then the processing cost is reduced, but the surface flatness is deteriorated
Solution Approach 1:
The cutting operation using a bit is segmented from the surface finishing operation. Cutting removes the bulk of the insulating film at reduced cost, while a subsequent polishing step restores surface flatness. This segmentation allows the use of cost-effective cutting methods without sacrificing the required surface quality for subsequent photolithography processes.
4Stability of the object's composition
If the wafer is fixed to hold the back side for cutting, then the cutting stability is improved, but the front side thickness control is deteriorated
Solution Approach 1:
Instead of fixing the wafer by the back side (conventional method), the invention inverts the approach by fixing the wafer by the front side (wafer surface) during cutting operations. This inversion allows direct control and monitoring of the front side thickness during material removal, ensuring precise thickness control while maintaining cutting stability through secure front-side clamping.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces processing time and cost by primarily using the cutting step for material removal and the polishing step for finishing, achieving a more efficient and cost-effective planarization of the insulating film surface compared to traditional methods.
Implementation Method 1
an additional layer cutting step of flat cutting the additional layer formed on the front side of the semiconductor wafer by using the cutting member rotating with the rotating member
Implementation Method 2
an additional layer polishing step of polishing the additional layer after the additional layer cutting step
Data Source
AI summary
A semiconductor wafer processing method for planarizing an additional layer formed on the front side of a semiconductor wafer. First, the wafer is held on a chuck table included in a cutting device in the condition where the additional layer is exposed, and a table base supporting the chuck table is moved toward a working position. In concert with the movement of the table base, the exposed surface of the additional layer is cut by a bit of a cutting tool rotationally driven by a spindle motor. Thereafter, the exposed surface of the additional layer is polished by a polishing device to planarize the exposed surface of the additional layer.