Semiconductor Wafer Planarization via Variable-Thickness Mask Layer

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Solution Overview

Problem

In semiconductor wafer manufacturing, achieving low total thickness variation (TTV) is challenging due to variations in wafer thickness affecting blocking voltages, requiring complex and costly processes to reduce TTV effectively.

Innovation Solution

A method involving a mask layer with varying thicknesses is applied to the semiconductor wafer, where the mask layer is thinner on thicker areas and thicker on thinner areas, facilitating selective removal of the semiconductor layer through processes like dry etching or polishing to achieve fine planarization, with the mask layer formed from materials like nitrides or oxides to enhance mechanical and chemical selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If complex measures are performed to reduce total thickness variation, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvetotal thickness variationVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A mask layer is formed on the semiconductor wafer surface before the planarization process. This mask layer has varying thicknesses that are predetermined to compensate for thickness variations in different areas of the wafer. The preliminary formation of this compensating mask layer enables subsequent uniform removal of material, achieving low TTV without requiring complex real-time control during processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the thickness parameter of the mask layer to compensate for wafer thickness variations. By forming a mask layer with specifically controlled varying thicknesses (thinner in thinning areas, thicker in areas not to be thinned), the process transforms the problem of non-uniform wafer thickness into a controlled material removal process, achieving high precision with simpler subsequent steps.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If uniform mask layer thickness is used, then ease of manufacture is improved, but manufacturing precision deteriorates

Engineering Contradiction:
Improvemask layer formationVSAvoidplanarization precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The mask layer is designed with local quality variations - different thicknesses in different areas of the wafer. Areas requiring more thinning have thinner mask layers, while areas requiring less thinning have thicker mask layers. This local differentiation enables precise control of the planarization process across the wafer surface, achieving high manufacturing precision while maintaining relatively simple formation processes.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10431471B2Method of planarizing a semiconductor wafer and semiconductor wafer
Publication Date: 2019.10.01 INFINEON TECHNOLOGIES AG
  • US10431471B2 patent drawing
  • US10431471B2 patent drawing
  • US10431471B2 patent drawing

AI summary

Various embodiments provide a method of planarizing a semiconductor wafer, wherein the method comprises providing a semiconductor wafer comprising a surface; and forming a mask layer on the surface of the semiconductor wafer, wherein a thickness of the mask layer is smaller in thinning areas, which are to be thinned for planarizing, than in areas which are not to be thinned for planarizing.