Wafer Test Structure Dicing Using Backside Plasma Trenches
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The hardness and brittleness of silicon wafers cause difficulties in wafer dicing, leading to cracks when test keys are cut or preheated, and existing methods result in low yield and productivity.
Innovation Solution
A method involving a plasma process from the back side of the wafer to form trenches that connect with pre-existing trenches on the front side, allowing for precise cutting without removing test structures, using a grinding tape to cover the front side and etching with gases like SF6 to avoid damaging other materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a diamond saw or diamond wheel saw is used to cut the silicon wafer surface, then the wafer can be diced, but cracks occur on the silicon wafer due to the hardness and brittleness of the material
Solution Approach 1:
The patent replaces the mechanical diamond saw cutting system with a plasma etching system. The plasma process uses reactive ions to chemically etch the silicon wafer along predetermined scribe lines, eliminating mechanical contact and the associated cracking issues. The plasma etching process selectively removes material through chemical reactions rather than mechanical force, thereby maintaining wafer integrity while achieving efficient dicing.
Solution Approach 2:
The patent changes the physical and chemical parameters of the cutting process by transitioning from mechanical cutting to plasma-based chemical etching. By controlling plasma parameters such as gas composition (SF6, CF4), power, pressure, and temperature, the process achieves precise cutting without mechanical stress, resolving the contradiction between cutting efficiency and wafer integrity.
2Ease of manufacture
If test keys are preheated and removed before cutting the silicon wafer with a laser, then the wafer can be cut, but the process becomes complex and time-consuming
Solution Approach 1:
The patent extracts the test keys from the cutting process by performing plasma etching that selectively targets the scribe lines while automatically avoiding the test key structures. The test keys remain on the wafer surface and are not removed, eliminating the need for separate test key removal steps and simplifying the overall manufacturing process.
Solution Approach 2:
The patent performs preliminary plasma etching to create trenches along the scribe lines before final dicing. These pre-formed trenches guide the subsequent cutting process and ensure that test keys are automatically avoided, eliminating the need for separate test key removal operations and reducing total processing time.
3Productivity
If both the silicon wafer and test keys are cut together with a saw, then the cutting process is simplified, but cracks occur on the silicon wafer
Solution Approach 1:
The patent applies local quality by creating trenches with specific dimensions and depths at precise locations along the scribe lines, while deliberately avoiding the test key regions. The plasma etching process parameters are locally optimized to etch through the wafer thickness at scribe lines while stopping before reaching test keys, achieving both high throughput and wafer quality simultaneously.
Solution Approach 2:
Instead of cutting the test keys and wafer together as in conventional methods, the patent inverts the approach by using plasma etching to create protective trenches that automatically exclude test keys from the cutting path. This inverted strategy maintains simplicity while eliminating cracks by never contacting the test key structures with cutting tools.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method increases productivity by preventing cracks and allowing more dice on the wafer, maintaining the test structure on the scribe line, and enhancing the yield of the dicing process.
Implementation Method 1
a plasma process is performed, wherein the plasma process includes etching the back side of the wafer to form two second trenches respectively penetrating the wafer
Implementation Method 2
a grinding tape is provided to cover the front side of the wafer and contact the test structure. After thinning the wafer
Data Source
AI summary
A wafer with a test structure includes a wafer with a front side and a back side. A first die, a second die, a third die and a scribe line are disposed on the wafer. The scribe line is positioned between the dice. The first die includes a first dielectric layer and a first metal connection disposed within and on the first dielectric layer. A test structure and a dielectric layer are disposed on the scribe line, wherein the test structure is on the dielectric layer. Two first trenches are respectively disposed between the first dielectric layer and the dielectric layer and disposed at one side of the dielectric layer. Two second trenches penetrate the wafer, and each of the two second trenches respectively connects to a corresponding one of the two first trenches. A grinding tape covers the front side of the wafer and contacts the test structure.