Wafer Pod Handling via Single Load Port
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Solution Overview
Problem
Conventional semiconductor processing stations have a large footprint and are complex, leading to increased costs and reduced throughput due to the need for multiple load ports and inefficient transport carrier handling processes.
Innovation Solution
A semiconductor processing station with a centralized transfer module and load port configuration that uses a carrier transport track to efficiently load and unload transport carriers, reducing the number of load ports and simplifying the handling process, while maintaining a sealed environment for precise atmospheric control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple load ports are used in conventional semiconductor processing stations, then substrate handling capacity is improved, but device complexity and footprint increase
Solution Approach 1:
The single load port is designed to perform multiple functions: loading transport carriers, unloading processed carriers, and facilitating substrate transfer. The port serves as a multi-functional interface that replaces what would traditionally require multiple dedicated ports, thereby reducing complexity while maintaining handling capacity
Solution Approach 2:
Multiple separate load port functions are merged into a single integrated load port structure. The port combines carrier loading, carrier unloading, and substrate transfer capabilities in one unified interface, reducing the overall number of ports needed in the system
2Productivity
If multiple load ports are used in conventional semiconductor processing stations, then substrate handling capacity is improved, but footprint area increases
Solution Approach 1:
Multiple load port functions are merged into a single compact load port structure, significantly reducing the horizontal space required. The integrated design allows carrier loading and unloading operations to occur within a smaller footprint compared to having separate dedicated ports for each function
Solution Approach 2:
The system transitions from a horizontal expansion model (multiple ports spread across the chamber) to a vertical integration model (single port with multi-level carrier positioning). Carriers can be positioned at different vertical levels or orientations, allowing multiple functions to be accessed through one port without increasing horizontal footprint
3Reliability
If conventional transport carrier handling processes are used, then substrate processing is maintained, but tool complexity and costs increase
Solution Approach 1:
The transport carrier is designed with self-aligning features and standardized interfaces that enable automatic coupling with the load port and processing modules. The carrier's own structure facilitates its handling and positioning, reducing the need for complex external manipulation mechanisms
Solution Approach 2:
Transport carriers are pre-positioned and pre-oriented on the carrier track before entering the load port. The system prepares carriers in advance by positioning them at correct orientations and locations, so that when they reach the load port, they are ready for immediate processing without requiring complex real-time adjustment mechanisms
Data Source
AI summary
A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.