Semiconductor Wafer Double-Side Polishing Flatness Control

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Solution Overview

Problem

Existing methods for producing semiconductor wafers struggle to achieve both global and local flatness simultaneously, requiring multiple polishing steps and resulting in suboptimal edge exclusion and flatness parameters.

Innovation Solution

A double-side polishing method using a polishing agent with a lower concentration of SiO2 (0.1-0.4% by weight) and an alkaline component (0.1-0.9% by weight), applied until the wafer center is 10-30 μm thinner than the carrier, to improve both global and local flatness without additional polishing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional polishing methods are used, then material removal is achieved, but global and local flatness cannot be improved simultaneously

Engineering Contradiction:
ImproveflatnessVSAvoidpolishing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention changes the chemical composition parameters of the polishing agent, specifically using a slurry with 0.1-0.4% SiO2 and 0.1-0.9% alkaline component, which enables simultaneous improvement of both global and local flatness during a single polishing step while maintaining high material removal rates

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If multiple polishing steps are used to improve flatness, then manufacturing precision increases, but production time and complexity increase

Engineering Contradiction:
ImproveflatnessVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The invention merges multiple polishing functions into a single polishing step by using a specifically formulated slurry that simultaneously achieves both global flatness (SBIR < 100 nm) and local flatness (PSFQR ≤ 35 nm), eliminating the need for sequential polishing steps and reducing production time

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If conventional polishing agents are used, then polishing can be performed, but edge roll-off and edge exclusion remain problematic

Engineering Contradiction:
Improvepolishing processabilityVSAvoidedge flatness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention modifies the chemical parameters of the polishing agent by using low concentrations of SiO2 (0.1-0.4%) and alkaline components (0.1-0.9%), which enables precise control of material removal at the wafer edges, reducing edge roll-off and minimizing the edge exclusion area while maintaining overall polishing efficiency

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method significantly enhances global and local flatness, reducing edge roll-off and achieving favorable SFQR and SBIR values with a single polishing step, while maintaining a small edge exclusion area.

Implementation Method 1

Both sides of the semiconductor wafer are polished between an upper and a lower polishing plate with a polishing agent

Methodology Applied
Scientific EffectAbrasion: Abrasion

Implementation Method 2

The polishing agent contains 0.1 to 0.4% by weight of SiO2 and 0.1 to 0.9% by weight of an alkaline component

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentUS8242020B2Method for producing a semiconductor wafer
Publication Date: 2012.08.14 SILTRONIC AG
  • US8242020B2 patent drawing
  • US8242020B2 patent drawing
  • US8242020B2 patent drawing

AI summary

A method for producing a semiconductor wafer. The method includes placing the semiconductor wafer in a cutout in a carrier. Both sides of the semiconductor wafer are polished between an upper and a lower polishing plate with a polishing agent until the thickness of the center of the semiconductor wafer is less than the thickness of the carrier and from 10 μm to 30 μm of semiconductor wafer material is removed. The polishing agent contains 0.1 to 0.4% by weight of SiO2 and 0.1 to 0.9% by weight of an alkaline component.