Wafer Positioning With Asymmetric Cut Marks After Grinding

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Solution Overview

Problem

Chipping during the grinding of semiconductor wafers can affect the accuracy of position determination, making it difficult to reliably separate and position semiconductor chips.

Innovation Solution

A position determining method that involves forming distinct cut marks with different widths on the semiconductor wafer, where a wider cut mark is used to improve grinding quality and enhance the detectability of a notch, allowing for more accurate position determination by distinguishing the cut marks based on light transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If grinding is performed on the back surface of the semiconductor wafer, then the wafer thickness is reduced and flatness is improved, but chipping occurs at the wafer edge which affects position determination accuracy

Engineering Contradiction:
Improvewafer flatnessVSAvoidchipping at wafer edge
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A groove is formed at the wafer edge before grinding to create a chamfered surface. This preliminary action prevents chipping during subsequent grinding by removing the vulnerable edge material in advance, allowing the grinding process to proceed without generating chips that would interfere with position determination.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The groove formation creates a chamfered edge that acts as a protective feature against chipping. By pre-shaping the edge geometry, the invention counteracts the harmful chipping effect that would otherwise occur during grinding, enabling accurate position determination without interference from chips.

Inventive Principle:
Principle #9Preliminary anti-action

2Measurement precision

If a single cut mark width is used, then the manufacturing process is simple, but the notch detectability and position determination accuracy are insufficient

Engineering Contradiction:
Improvenotch detectabilityVSAvoidcut mark structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention uses cut marks with different widths (first cut mark and second cut mark) to create an asymmetric pattern. This asymmetry enables the position determination apparatus to distinguish between different features and accurately detect the notch position, improving measurement precision while accepting increased structural complexity.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different regions of the wafer are marked with different cut mark widths according to their specific functions. The first cut mark width is optimized for one purpose while the second cut mark width serves another, allowing each local region to have the quality needed for its specific role in position determination.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If the cut mark width is increased to improve notch detectability, then position determination accuracy improves, but the amount of material removed increases

Engineering Contradiction:
Improveposition determination accuracyVSAvoidwafer material removal
Core Design Contradiction:
Measurement precisionVSLoss of substance

Solution Approach 1:

The invention optimizes the parameters of cut marks by using different widths for different cut marks rather than uniformly increasing all cut mark dimensions. This parameter optimization achieves sufficient notch detectability and position determination accuracy while minimizing the total material removed from the wafer.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively suppresses chipping and improves the recognizability of the notch, enabling more precise position determination and chip separation during the manufacturing process.

Implementation Method 1

a light source and a light receiving portion opposing each other with the wafer therebetween

Methodology Applied
Scientific EffectLight transmission: Light

Data Source

PatentUS20240071826A1Position determining method and manufacturing method of semiconductor device
Publication Date: 2024.02.29 KIOXIA CORP
  • US20240071826A1 patent drawing
  • US20240071826A1 patent drawing
  • US20240071826A1 patent drawing

AI summary

A position determining method according to the present embodiment is a position determining method of a wafer which has a plurality of singulated chips and which is pasted on a tape. In addition, the present position determining method includes irradiating, with light, the wafer which has a first cut mark provided between the chips and a second cut mark with a width that differs from a width of the first cut mark. Furthermore, the present position determining method includes receiving irradiated light at a position opposing an irradiation position of light across the wafer. In addition, the present position determining method includes determining a position of the wafer based on a width of received light having passed through the wafer.