Wafer Positioning Calibration for Uniform Edge Etching

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Solution Overview

Problem

Existing semiconductor wafer edge etching technologies face challenges in achieving precise and uniform edge etching due to inaccuracies in wafer positioning, leading to potential damage and non-uniform etched widths that affect chip manufacturing yield.

Innovation Solution

A wafer positioning system and method that utilizes a robot arm with continuous fine-tuning and calibration of position configuration parameters, incorporating image edge detection and positioning calibration modules to iteratively adjust the placement of wafers, ensuring accurate alignment and uniform etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional polishing method is used to etch wafer edge, then the process is simple and low cost, but the etching uniformity is poor and may damage the thin layer and substrate

Engineering Contradiction:
Improveprocess simplicity and costVSAvoidetching uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent replaces the mechanical polishing method with a chemical etching method using corrosive gas or liquid. This substitution eliminates the mechanical contact that causes uneven removal and potential damage, while achieving uniform etching through chemical reactions. The chemical etching process allows precise control of etching depth and uniformity without the limitations of mechanical polishing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If filming method is used to protect wafer areas, then selective etching can be achieved, but the process steps are numerous and equipment complexity is high

Engineering Contradiction:
Improveselective etching capabilityVSAvoidnumber of process steps and equipment
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the complex filming process by using a direct positioning and etching approach. Instead of depositing protective films, removing them, etching, and then removing the films again, the invention uses positioning pins to directly guide the etching process to the desired areas. This extraction of the filming step simplifies the process flow, reduces the number of equipment requirements, and maintains selective etching capability through precise positioning alone.

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If shower method with special nozzle is used for edge etching, then accurate and uniform etching can be achieved, but the equipment design precision requirements are very high and cost is too high

Engineering Contradiction:
Improveetching accuracy and uniformityVSAvoidequipment design precision and cost
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent uses a simplified positioning model where standard positioning pins replicate the positioning function without requiring complex nozzle systems. Instead of designing and manufacturing high-precision shower nozzles with complex fluid dynamics requirements, the invention copies the essential positioning function using simple, manufacturable pins that guide the etching process. This copying approach achieves the same positioning accuracy with much lower equipment complexity and cost.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20250285900A1Wafer positioning system and method
Publication Date: 2025.09.11 WUXI HUAYING MICROELECTRONICS TECH CO LTD
  • US20250285900A1 patent drawing
  • US20250285900A1 patent drawing
  • US20250285900A1 patent drawing

AI summary

A semiconductor processing apparatus and a method are provided. The method comprises: placing, by a robot, a wafer on a first supporting area of a lower chamber of a semiconductor processing device according to set or updated current position configuration parameters; etching an edge area of the wafer using the semiconductor processing device; performing image acquisition and recognition to the etched wafer placed based on the current position configuration parameters to obtain etched edge information of the wafer; calculating position deviation parameters using a positioning calibration module; and updating, by a control unit, the current position configuration parameters based on the position deviation parameters, and controlling the robot to place the obtained wafer on the first supporting area of the lower chamber at a position corresponding to the updated current position configuration parameters. This enables improved wafer positioning through calibrating the robot.