Wafer Power Device Characterization Using Unified Parametric System
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Solution Overview
Problem
Current technologies lack a solution for performing production-level characterization of power devices on wafers, incorporating parametric-sensitive measurements, and meeting the speed requirements of production processes.
Innovation Solution
A unified test and measurement system that integrates parametric systems with power device measurements, using a probe card with specialized pins for low voltage/low current and high voltage/high current measurements, and substituting a scope with an ultra-fast pulse measure unit (PMU) to facilitate dynamic tests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional static characterization platforms are used, then measurement precision for static parameters is improved, but productivity is reduced due to inability to perform dynamic tests
Solution Approach 1:
The patent merges conventional static characterization capabilities with dynamic testing capabilities into a single integrated platform. The system combines source measure units (SMUs) for static parameter measurement with pulse generation and measurement circuits for dynamic characterization, enabling both static and dynamic tests to be performed on the same equipment without requiring separate dedicated platforms.
Solution Approach 2:
The measurement platform is designed with multi-functionality to perform various characterization tasks including static I/V curves, dynamic switching parameters, body diode measurements, and gate charge characterization. The system uses configurable test circuits and software control to adapt to different measurement requirements, making a single platform capable of replacing multiple specialized devices.
2Adaptability or versatility
If dedicated dynamic testing platforms with scope and capacitor bank are used, then dynamic characterization capability is improved, but device complexity increases and ease of operation decreases
Solution Approach 1:
The patent integrates dynamic testing functionality directly into the static characterization platform by incorporating pulse generation circuits, current sense resistors, and measurement capabilities within the same test system. This eliminates the need for separate scope and capacitor bank equipment, reducing overall system complexity while maintaining dynamic testing capability.
Solution Approach 2:
The system uses configurable test circuits and software as intermediaries to manage the complexity of dynamic measurements. The software automatically controls the sequence of operations, including pulse generation, data acquisition, and parameter extraction, simplifying the operation for users while handling the complex underlying electronics.
3Productivity
If production-level automated parametric testing is implemented, then productivity is improved, but measurement precision for parametric-sensitive measurements deteriorates
Solution Approach 1:
The system implements feedback mechanisms where measurement results are continuously monitored and used to adjust subsequent test parameters. The automated parametric testing software analyzes measured values and modifies test conditions in real-time to maintain measurement precision even at production speeds, ensuring that rapid testing does not compromise accuracy.
Solution Approach 2:
The patent employs dynamic parameter adjustment during automated testing to optimize both speed and precision. The system changes measurement parameters such as pulse width, voltage levels, and sampling rates based on the specific device characteristics and test requirements, enabling high-throughput production-level characterization while maintaining the precision needed for parametric-sensitive measurements.
Data Source
AI summary
In some examples, the system may include a parametric system matrix coupled one or more test and measurement instruments. Also, the system may include an adapter circuit coupled to the parametric system matrix, the adapter circuit having a voltage clamping circuit coupled to the parametric system matrix. Furthermore, the system may include a probe circuit coupled to the adapter circuit and to the power device, where the power device is disposed on a wafer.