Wafer Pre-alignment via Mark Detection and Positional Compensation
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Solution Overview
Problem
Existing wafer pre-alignment systems face challenges in achieving high accuracy due to variations in wafer shapes and notch positions, leading to inadequate placement accuracy in photolithography processes.
Innovation Solution
A high-accuracy apparatus and method utilizing a mark detection system with a motion assembly, focus adjustment assembly, and vision assembly to accurately align and compensate for the positions of alignment marks on the wafer, calculating rotation angles and deviations to determine the relative positional relationship between the wafer center and the wafer stage, thereby enhancing centering and orientation accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If a peripheral vision acquisition system is used to capture images of wafer edge or notch for pre-alignment, then the alignment process can be automated, but the measurement precision is insufficient due to variations in wafer shapes and notch positions among different manufacturers
Solution Approach 1:
The patent uses alignment marks as standardized reference copies instead of relying on variable physical features like edges or notches. These marks provide consistent reference points that can be accurately detected and measured, eliminating the precision problems caused by manufacturing variations in wafer shapes and notch positions across different manufacturers
Solution Approach 2:
The patent changes the measurement parameter from physical geometric features (edge, notch) to artificial alignment marks with defined coordinate systems. By establishing marks with known positions and orientations, the system can accurately determine wafer centering and orientation through coordinate transformation calculations rather than relying on variable physical features
2Measurement precision
If alignment marks are used to improve measurement precision, then wafer centering and orientation accuracy can be enhanced, but the device complexity increases due to the need for mark detection system with motion assembly, focus adjustment assembly, and vision assembly
Solution Approach 1:
The patent combines the motion assembly, focus adjustment assembly, and vision assembly into an integrated mark detection system. These subsystems work together cooperatively to locate and measure alignment marks, achieving high measurement precision while managing device complexity through functional integration rather than separate independent systems
Solution Approach 2:
The alignment marks themselves serve as self-contained reference standards that provide their own coordinate system definitions. The marks include built-in geometric relationships (such as lines passing through centers, right-angle intersections) that automatically provide reference information, eliminating the need for external calibration standards or additional reference features
3Adaptability or versatility
If different manufacturers produce wafers with varying shapes and notch positions, then manufacturing versatility is maintained, but the reliability of pre-alignment system decreases because different photolithography tools have different centering and orientation accuracy requirements
Solution Approach 1:
The alignment mark structure serves multiple functions: it provides reference points for centering, reference lines for orientation, and coordinate system definitions for positional relationships. This multi-functional design allows the same mark structure to meet the varying accuracy requirements of different photolithography tools and different wafer manufacturers, achieving both universality and reliability
Solution Approach 2:
The alignment marks are pre-defined with specific geometric relationships and coordinate system definitions before wafer fabrication. This preliminary establishment of reference standards ensures that regardless of subsequent variations in wafer manufacturing by different manufacturers, the pre-alignment system has reliable reference points to achieve accurate centering and orientation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves higher wafer centering and orientation accuracy, ensuring precise placement that meets the requirements of photolithography tools by capturing images of alignment marks and performing positional compensation.
Implementation Method 1
the vision assembly for mark acquisition configured to capture an image of the first or second alignment mark
Implementation Method 2
the focus adjustment assembly configured to adjust a focal length of the vision assembly for mark acquisition with respect to the first or second alignment mark
Data Source
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AI summary
An apparatus for pre-aligning a wafer comprises: a wafer stage for carrying the wafer, wherein a first alignment mark (W1) and a second alignment mark (W2) are arranged on the wafer such that they are substantially symmetrical to each other with respect to a center of the wafer; a peripheral vision acquisition system (1), configured to perform a first positional compensation for the wafer based on a relative positional relationship of an edge or a notch of the wafer with respect to the wafer stage; and a mark detection system (4), configured to capture images of the first and second alignment marks (W1, W2) and perform a second positional compensation for the wafer by determining a relative positional relationship of the center of the wafer with respect to a center of the wafer stage based on the positions of the first and second alignment marks (W1, W2) in a coordinate system of the mark detection system, wherein the coordinate system of the mark detection system (4) has a horizontal axis (X) defined by a line passing through the center of the wafer stage and a center of the mark detection system (4) and a vertical axis (Y) defined by a line crossing the horizontal axis (X) at right angles and passing through the center of the wafer stage.