Wafer-Level Probe Contact Pad Dynamics for Thermal Expansion
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Solution Overview
Problem
Wafer-level reliability testing faces challenges due to mismatched thermal expansion coefficients between probe head assemblies and substrates, leading to spacing issues and distortion, which require oversized contact pads, consuming valuable space and limiting test capabilities over extended temperature ranges.
Innovation Solution
The method involves equilibrating the substrate and probe head assembly at a test temperature, aligning and bringing probe tips into contact with corresponding contact pads, and testing subsets of devices under test, using a probe system with a controller and temperature-regulating structure to maintain alignment and contact across varying temperatures without the need for oversized pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If contact pads are oversized to accommodate spacing differences over temperature ranges, then testing reliability over extended temperature ranges is enabled, but valuable space on the substrate surface is consumed
Solution Approach 1:
The patent changes the physical state and dimensional parameters of the contact pads by applying compressive stress to reduce their diameter dynamically. This allows the contact pads to maintain electrical contact despite thermal expansion mismatches between the probe head assembly and substrate, enabling testing over extended temperature ranges without requiring oversized static contact pads
Solution Approach 2:
The patent introduces dynamic adjustment capability to the contact pad system through compressive stress application. The contact pads can dynamically reduce their diameter in response to thermal conditions, transforming from static fixed-size pads to dynamically adjustable pads that adapt to temperature-induced spacing variations
2Area of stationary object
If contact pads are made smaller to save space, then more devices can be tested on substrate, but spacing differences over temperature ranges cannot be accommodated
Solution Approach 1:
The patent enables small contact pads to maintain functionality over temperature ranges by dynamically changing their dimensional parameter (diameter) through compressive stress. This allows compact contact pad designs to accommodate thermal expansion mismatches without requiring larger static pads, preserving substrate space while maintaining temperature range testing capability
3Manufacturing precision
If probe head assembly spacing is matched to DUT spacing at design temperature, then alignment is achieved at that temperature, but spacing differences occur at other temperatures due to thermal expansion mismatch
Solution Approach 1:
The patent compensates for thermal expansion mismatch by dynamically changing the contact pad diameter through compressive stress. This parameter change allows the system to maintain alignment and contact despite spacing differences that occur between the probe head assembly and DUTs when temperature deviates from the design temperature
Solution Approach 2:
The patent transforms the static alignment system into a dynamic one where contact pads can adjust their effective size in response to thermal conditions. This dynamic adjustment maintains alignment precision across temperature ranges, enabling the system to adapt to spacing variations caused by differential thermal expansion
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient wafer-level testing over extended temperature ranges with reduced contact pad size, enabling more devices to be tested on a substrate while maintaining alignment and contact, even under thermal expansion variations.
Implementation Method 1
a coefficient of thermal expansion of the probe head assembly may not be matched, or identically matched, to a coefficient of thermal expansion of the substrate. Thus, changes in test temperature may lead to differences in a spacing of the probe heads
Data Source
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AI summary
Probe systems, storage media, and methods for wafer-level testing over extended temperature ranges are disclosed herein. The methods are configured to test a plurality of devices under test (DUTs) present on a substrate. The probe systems are programmed to perform the methods. The storage media include computer-readable instructions that direct a probe system to perform the methods.