Semiconductor Wafer Protection Sheet with Dual-Layer Adhesion and Peelability

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Solution Overview

Problem

Semiconductor wafer surface protection sheets face challenges with peeling from patterned surfaces, especially those with porous structures or complex irregularities, due to materials from the irregularity absorbing and adhesive layers flowing into pores or gaps, leading to difficulties in peeling after grinding.

Innovation Solution

A semiconductor wafer surface protection sheet comprising a base layer, a resin layer A with specific tensile elasticity and density for good adhesion and adjustability, and a resin layer B with higher elastic modulus for high peelability, where resin layer A is between the base layer and resin layer B, and resin layer B is at the outermost surface, ensuring balanced tensile elasticity and thickness for effective adhesion and peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a semiconductor wafer surface protection sheet with irregularity absorbing layer and adhesive layer is attached to a porous circuit protection layer, then good adhesion to surface irregularities is achieved, but materials flow into the pores making peeling difficult

Engineering Contradiction:
Improveadhesion to surface irregularitiesVSAvoidpeelability after grinding
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The protection sheet is divided into three distinct layers: a base layer, an irregularity absorbing layer with specific elasticity characteristics, and an adhesive layer. This segmentation allows each layer to perform its specific function - the irregularity absorbing layer conforms to surface variations without flowing into pores, while the adhesive layer provides controlled adhesion that enables easy peeling after grinding.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different layers are assigned different material properties tailored to their specific functions. The irregularity absorbing layer has controlled elasticity (storage modulus 10³-10⁶ Pa at 60°C) to match surface irregularities locally, while the adhesive layer has specific adhesion characteristics (10-100 cN/m) that prevent material flow into pores during attachment but allow clean peeling afterward.

Inventive Principle:
Principle #3Local quality

2Reliability

If the protection sheet is attached to a patterned surface with complex irregularities, then good coverage is achieved, but materials flow into gaps making peeling difficult

Engineering Contradiction:
Improvecoverage of patterned surfaceVSAvoidpeelability after grinding
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent specifies precise parameter ranges for the irregularity absorbing layer, particularly the storage modulus at 60°C (10³-10⁶ Pa) and loss tangent (0.1-1.0). These parameter controls ensure the material has sufficient flexibility to conform to complex irregularities and gaps in the patterned surface, while maintaining enough structural integrity to prevent permanent flow into gaps and enable clean peeling after the grinding process.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides good adhesion to irregularities on semiconductor wafers and ensures easy peeling after grinding, even from porous circuit protection layers, maintaining surface integrity and preventing adhesive residue.

Implementation Method 1

a resin layer A which has a tensile elasticity at 25° C., EA(25), of 1 MPa or more and a tensile elasticity at 60° C., EA(60), of 0.005 MPa to 1 MPa, the EA(60)/EA(25) satisfying the condition 0.003≤EA(60)/EA(25)<0.01

Methodology Applied
Scientific EffectElasticity: Elasticity

Implementation Method 2

a resin layer B having a tensile elasticity at 60° C., EB(60), of 1 MPa or more and having a thickness of 0.1 μm to less than 100 μm, the EB(60) being larger than the EA(60) of the resin layer A

Methodology Applied
Scientific EffectElastic modulus: Elasticity

Data Source

PatentUS8476740B2Sheet for protecting surface of semiconductor wafer, semiconductor device manufacturing method and semiconductor wafer protection method using sheet
Publication Date: 2013.07.02 MITSUI CHEM TOHCELLO INC
  • US8476740B2 patent drawing
  • US8476740B2 patent drawing
  • US8476740B2 patent drawing

AI summary

To provide a semiconductor wafer surface protection sheet having good adhesion to irregularities on a patterned surface of a semiconductor wafer and having good peelability after wafer grinding. Specifically, a semiconductor wafer surface protection sheet is provided that includes a base layer having a tensile elasticity at 25° C., E(25), of 1 GPa or more; a resin layer A that satisfies the condition EA(60)/EA(25)&lt;0.1, where EA(25) is a tensile elasticity at 25° C. and EA(60) is a tensile elasticity at 60° C., the EA(60) ranging from 0.005 MPa to 1 MPa; and a resin layer B having a tensile elasticity at 60° C., EB(60), of 1 MPa or more and having a thickness of 0.1 μm to less than 100 μm, the EB(60) being larger than the EA(60) of the resin layer A.