Wafer Reflectance Measurement for Threading Dislocation Density

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High threading dislocation density (TDD) in nitride-based semiconductor wafers leads to reduced luminescent efficiency and shortened lifespan of semiconductor light-emitting devices, necessitating effective methods to evaluate and control crystal quality.

Innovation Solution

An apparatus and method involving the measurement of surface reflectance using an optical device to calculate TDD, which includes forming surface features like notches or V-pits in the wafer layers and using a data processing unit to determine the quality of the crystal in real-time during growth, thereby assessing and improving the semiconductor light-emitting device's characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If threading dislocation density is high in nitride-based semiconductor wafers, then manufacturing is easier and cost is lower, but luminescent efficiency and device lifespan deteriorate

Engineering Contradiction:
Improveluminescent efficiency and device lifespanVSAvoidwafer manufacturing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming V-pits or notches in the wafer structure before final device fabrication. These pre-formed surface features serve as dislocation sinks that prevent threading dislocations from propagating through the active layers, thereby improving crystal quality and device reliability before the actual light-emitting structures are built.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces V-pits or notches as intermediary structures between the substrate and the active device layers. These intermediary features act as dislocation management elements that intercept and contain threading dislocations, preventing them from reaching and degrading the luminescent active regions while allowing the overall manufacturing process to remain feasible.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If traditional TDD measurement methods are used, then manufacturing process is simpler, but measurement precision and real-time evaluation capability are insufficient

Engineering Contradiction:
ImproveTDD measurement accuracyVSAvoidevaluation apparatus complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical or chemical etching-based TDD measurement methods with optical reflectance measurement. By using light reflection properties to detect surface features like V-pits and notches, the system achieves high measurement precision without requiring complex physical manipulation or destructive testing procedures.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent enables the wafer structure itself to provide measurement information through its optical properties. The V-pits and notches formed during growth naturally create specific reflectance patterns that directly indicate dislocation density, allowing the structure to self-report its quality without requiring external probing or additional measurement infrastructure.

Inventive Principle:
Principle #25Self-service

3Reliability

If surface features like V-pits or notches are formed to reduce TDD, then crystal quality improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvecrystal qualityVSAvoidgrowth process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the crystal growth process with the formation of dislocation-managing surface features. By integrating V-pit or notch formation directly into the epitaxial growth sequence, the process combines two functions (growth and defect management) into a single unified operation, reducing overall process complexity despite the added functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses parameter changes during epitaxial growth to form V-pits or notches. By adjusting growth conditions such as temperature, pressure, or precursor flow rates at specific stages, the process creates surface features that manage dislocations without requiring separate fabrication steps, thereby improving crystal quality while maintaining manufacturing simplicity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the deterioration of semiconductor product characteristics and reliability by accurately measuring and controlling TDD, enhancing the luminescent efficiency and lifespan of nitride-based semiconductor light-emitting devices.

Implementation Method 1

measuring a surface reflectance of one or more layers selected from the first conductive layer, the active layer, and the second conductive layer of the wafer using an optical device

Methodology Applied
Scientific EffectReflectance measurement: Reflection

Data Source

PatentUS9334582B2Apparatus for evaluating quality of crystal, and method and apparatus for manufacturing semiconductor light-emitting device including the apparatus
Publication Date: 2016.05.10 SAMSUNG ELECTRONICS CO LTD
  • US9334582B2 patent drawing
  • US9334582B2 patent drawing
  • US9334582B2 patent drawing

AI summary

An apparatus for evaluating the quality of a crystal includes an optical device that measures a surface reflectance of a wafer in which a V-pit is formed; and a data processing unit that calculates a threading dislocation density by calculating a difference in surface reflectance of the wafer that is measured by the optical device.