Wafer Rewiring Double Verification Structure for Unified Functional Testing
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Solution Overview
Problem
Current chip packaging technologies require multiple verifications across different frameworks and devices, leading to increased manpower, resource waste, and design costs due to the need for multiple wafers, manufacturing processes, and customizations for diversified applications.
Innovation Solution
A wafer rewiring double verification structure is introduced, featuring a die with rewiring modules, a dielectric module with an inclined surface, and an electroplated layer that connects adjacent modules, allowing for functional verification on different rewiring forms within a single manufacturing process by forming a conduction layer between modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple verification frameworks and devices are used for different rewiring forms, then functional verification can be performed on diversified applications, but manpower consumption increases and resources are wasted
Solution Approach 1:
The patent combines multiple verification frameworks and devices into a single integrated wafer structure. Different rewiring modules (first rewiring module and second rewiring module with different wiring forms) are disposed on the same wafer, allowing multiple verification types to be performed simultaneously on one wafer rather than requiring separate wafers and frameworks for each verification type.
Solution Approach 2:
The wafer is designed with multi-functionality to perform diverse verification tasks. By incorporating multiple rewiring modules with different wiring configurations (e.g., different packaging forms such as BGA, QFN, SOP) on a single wafer, the system achieves universal verification capability across different applications without requiring separate specialized wafers for each packaging type.
2Adaptability or versatility
If multiple wafers and manufacturing processes are used for different verification types, then diversified rewiring verification is achieved, but design cost increases
Solution Approach 1:
The patent merges multiple verification processes into a single manufacturing process. Different rewiring modules are formed on the same wafer using a unified manufacturing approach, eliminating the need for separate manufacturing processes for each verification type. This reduces design complexity and associated costs while maintaining the ability to verify diverse rewiring configurations.
3Reliability
If multiple verification frameworks are used, then comprehensive functional verification is performed, but the comparison of verification data becomes difficult
Solution Approach 1:
By implementing a universal wafer platform that accommodates multiple rewiring modules with different configurations, the patent ensures that all verification data is generated from the same base framework. This unified approach maintains data comparability across different verification types while still achieving comprehensive functional verification coverage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient functional verification of different rewiring modules on the same wafer, reducing manpower and resource usage while minimizing design costs by eliminating the need for multiple verification frameworks and devices.
Implementation Method 1
an electroplated layer disposed on the inclined surface of the dielectric module
Data Source
AI summary
The present invention discloses a wafer rewiring double verification structure, and a manufacturing method and a verification method thereof, wherein the wafer rewiring double verification structure includes: a die having a substrate, a plurality of pads and a passivation layer; a plurality of rewiring modules; and a gap portion formed between every two adjacent rewiring modules. A dielectric module is disposed on each rewiring module, and is provided with an inclined surface; and an electroplated layer is disposed on the inclined surface. According to the present invention, functional verification can be performed on different rewiring modules on the same wafer in one manufacturing process.