Semiconductor Wafer RTA Cooling Profile for Edge Slip Suppression

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Solution Overview

Problem

Rapid thermal annealing (RTA) treatment at high temperatures leads to slips due to thermal stress, causing defects in semiconductor wafers, as the temperature distribution across the wafer plane is not uniform, and existing methods fail to adequately inhibit these slips.

Innovation Solution

A method involving a first temperature correction to eliminate variations across the wafer surface during RTA treatment, with a second correction of +0.1° C. to +5.0° C. for the wafer outer circumference during cooling, and performing RTA at 1250° C. or higher for 1 s to 60 s in an oxidizing atmosphere, using a support member with an inclined surface to reduce slips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RTA treatment is performed at high temperature (1300°C or higher) to eliminate surface defects and form BMD, then gettering performance is improved, but thermal stress causes slips at the wafer edge

Engineering Contradiction:
Improvegettering performanceVSAvoidwafer defect-free quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies different temperature corrections to different regions of the wafer. The second offset specifically targets the outer circumference region (within 10mm from the periphery) with a temperature correction value of +0.1°C to +5.0°C relative to other regions. This local temperature adjustment reduces thermal stress concentration at the edge where slips occur, while maintaining the overall high temperature treatment needed for gettering performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the temperature parameter distribution across the wafer surface by introducing offset corrections. The first offset eliminates temperature variations across the entire wafer surface, and the second offset further adjusts the outer circumference temperature. This parameter modification allows the wafer to undergo RTA treatment at 1300°C or higher for adequate gettering while preventing slip-induced defects through reduced thermal stress.

Inventive Principle:
Principle #35Parameter changes

2Speed

If rapid cooling is performed after RTA treatment to eliminate surface defects, then cooling efficiency is improved, but thermal stress and heat dissipation at the edge cause slips

Engineering Contradiction:
Improvecooling rateVSAvoidwafer defect-free quality
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies the second offset temperature correction to the outer circumference region before the rapid cooling process begins. This preliminary temperature adjustment creates a temperature buffer that counteracts the thermal stress that would otherwise develop during rapid cooling. By pre-adjusting the temperature distribution, the patent prevents slips from occurring during the high-speed cooling phase while maintaining efficient heat removal from the wafer.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively inhibits slips during rapid cooling, ensuring uniform temperature distribution and maintaining gettering performance for metal impurities, thereby improving semiconductor wafer quality.

Implementation Method 1

The heat treatment of rapid heating and the rapid cooling by the RTA treatment eliminates the defects on the surface and in the surface layer of semiconductor wafers

Methodology Applied
Scientific EffectRapid thermal annealing: Annealing

Implementation Method 2

the temperature difference in the wafer plane and the stress due to the self-weight of the semiconductor wafer cause slips to occur

Methodology Applied
Scientific EffectThermal stress: Thermal Expansion

Implementation Method 3

the edge surface of the wafer is more easily heat-dissipated than the center of the wafer, and in addition, slips tend to occur due to the superposition of both the heat transfer from the wafer edge surface to the wafer support member

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20240379341A1Method of manufacturing semiconductor wafers and method of manufacturing semiconductor devices
Publication Date: 2024.11.14 GLOBALWAFERS JAPAN
  • US20240379341A1 patent drawing
  • US20240379341A1 patent drawing
  • US20240379341A1 patent drawing

AI summary

A method of manufacturing a semiconductor wafer by performing the RTA treatment for suppressing slips is provided. The method of manufacturing a semiconductor wafer according to the present invention includes a step of performing the RTA treatment on a semiconductor wafer 1, wherein, for example, a first correction for eliminating temperature variations of the entire wafer surface is performed throughout the entire process of heating and cooling in the RTA treatment, and further, in the cooling process, a second correction of +0.1° C. or more and +5.0° C. or less is performed to a part or the entire wafer outer circumference 1d, which is an outer region including the wafer periphery.