Wafer-Scale Pixelated Detector System Gapless Readout
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current hybrid pixel detectors face challenges in covering large areas without gaps while achieving high dynamic range and low power dissipation, as they require large integration capacitance, leading to either large pixel sizes or limited dynamic range, and high power consumption.
Innovation Solution
A wafer-scale gapless and seamless detector system with small pixels, comprising a sensor, an interposer, and application-specific integrated circuits (ASICs), which uses a bipolar current splitter architecture to achieve high dynamic range and low power dissipation by integrating signal current into multiple scaled ranges without active sourcing, thereby reducing integration capacitance and power requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If adaptive-gain active integrator architecture is used to achieve large dynamic range, then dynamic range is improved, but pixel size must be large or power dissipation becomes high
Solution Approach 1:
The patent segments the integration process into multiple parallel channels, each handling a specific gain range. The sensor array is divided into multiple sensor chips, each connected to dedicated readout ASICs that perform integration with fixed gain. This segmentation eliminates the need for large total integration capacitance in a single channel, allowing small pixel sizes while achieving large overall dynamic range through the combination of multiple channels with different gain ranges.
Solution Approach 2:
The patent transitions from a single-dimension dynamic range approach (one integrator with variable gain) to a multi-dimensional approach using multiple parallel integration channels with fixed gains. By adding the dimension of parallel channels, each with optimized fixed gain, the system achieves large dynamic range without requiring large pixel area in any single channel.
2Measurement precision
If adaptive-gain active integrator is used to achieve large dynamic range, then dynamic range is improved, but power dissipation increases due to large bias currents
Solution Approach 1:
The integration function is segmented across multiple dedicated readout ASICs, each with fixed gain integrators. This eliminates the need for high-power active gain switching in a single integrator. Each ASIC operates at lower power with fixed gain, and the overall dynamic range is achieved by combining results from multiple ASICs with different gain settings, significantly reducing total power dissipation.
Solution Approach 2:
The patent changes the gain parameter from being dynamically variable in a single integrator to being fixed across multiple integrators. By fixing the gain in each integrator channel and using multiple channels with different fixed gain values, the system eliminates the high bias currents required for active gain adjustment, thereby reducing power dissipation while maintaining large dynamic range.
3Area of stationary object
If multiple sensor modules are tiled together to cover large area, then coverage area is improved, but gaps appear along module boundaries
Solution Approach 1:
The patent merges multiple sensor chips and readout ASICs into a unified wafer-scale detector system. The sensor chips are bonded together in a tiled arrangement, and the readout ASICs are integrated with the sensor array such that the combined system functions as a single gapless detector. The merging of these components eliminates gaps by ensuring continuous coverage across module boundaries through proper bonding and alignment techniques.
Solution Approach 2:
The patent employs a nested structure where readout ASICs are integrated with sensor chips at multiple hierarchical levels. The ASICs are positioned and bonded directly to the sensor array, with the combined assembly forming a unified detector unit. This nesting ensures that the readout electronics and sensing elements are tightly integrated, eliminating gaps between modules while maintaining full coverage.
Data Source
AI summary
A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.