Wafer Scale Thermoelectric Energy Harvester With Segmented Elements

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Solution Overview

Problem

Scaling down thermoelectric devices for applications like self-sustainable sensors and mobile devices poses challenges in generating enough energy while maintaining low manufacturing costs and addressing parasitic heat loss, which affects adjacent components in integrated circuits.

Innovation Solution

An integrated single chip thermoelectric energy harvester is designed with a substrate and dielectric layer containing alternating p-type and n-type thermoelectric elements connected in series, enclosed by a cap to reduce parasitic heat loss, and a thermal contact layer to maintain a thermal gradient, utilizing materials with controlled thermal resistance and interconnects to maximize energy generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the size of thermoelectric devices is scaled down for new applications, then device integration and portability are improved, but energy generation capability deteriorates

Engineering Contradiction:
Improvedevice sizeVSAvoidenergy generation capability
Core Design Contradiction:
Volume of moving objectVSPower

Solution Approach 1:

The thermoelectric device is divided into multiple discrete thermoelectric elements (both p-type and n-type) arranged in an array pattern. These segmented elements are connected in series through conductive pathways, allowing the device to maintain compact size while collectively generating sufficient electrical energy through the cumulative effect of multiple elements working together

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional bulk thermoelectric materials to a layered, two-dimensional structure where thin films of p-type and n-type materials are deposited in alternating patterns on a substrate. This dimensional change enables high surface area-to-volume ratio, maximizing heat absorption and energy generation within a minimal footprint suitable for integrated circuit integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If traditional materials and arrangements are used in thermoelectric devices, then manufacturing simplicity is maintained, but energy output is insufficient for certain applications

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidenergy output
Core Design Contradiction:
Ease of manufactureVSPower

Solution Approach 1:

The patent optimizes key parameters including the geometric dimensions of thermoelectric elements (length, width, thickness), the spacing between elements, the arrangement pattern (alternating p-type and n-type), and the thermal/electrical conductivity ratios. These parameter changes maximize the thermoelectric figure of merit (ZT) and energy output while maintaining compatibility with standard semiconductor manufacturing processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The device employs composite structures combining different p-type and n-type thermoelectric materials with distinct electrical and thermal properties. By strategically selecting and combining materials with complementary characteristics (high electrical conductivity, low thermal conductivity, appropriate Seebeck coefficients), the patent achieves superior energy generation performance compared to single-material designs

Inventive Principle:
Principle #40Composite materials

3Adaptability or versatility

If thermoelectric devices are integrated into circuits, then system integration is improved, but parasitic heat loss affecting adjacent components increases

Engineering Contradiction:
Improvesystem integrationVSAvoidparasitic heat loss
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and isolates the thermoelectric energy generation function into a dedicated, self-contained device structure with defined boundaries. The device includes separate heat input and output regions, with thermal management features that confine heat flow paths within the device boundaries, preventing parasitic heat loss to adjacent circuit components while maintaining integration capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces thermal interface layers and heat spreader structures as intermediary elements between the thermoelectric elements and adjacent components. These intermediaries act as thermal buffers that manage heat distribution, directing useful heat through the thermoelectric conversion path while isolating adjacent circuit components from harmful thermal effects

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables high energy density and low-cost thermoelectric devices with reduced parasitic heat loss, allowing for efficient energy harvesting in compact integrated circuits, suitable for various applications including sensors and mobile devices.

Implementation Method 1

Thermoelectric devices convert heat (e.g., thermal energy) into electric energy. A temperature difference between a hot side and a cold side of a thermoelectric device moves charge carriers in a semiconductor material of the thermoelectric device to generate electric energy.

Methodology Applied
Scientific EffectSeebeck effect: Seebeck Effect

Implementation Method 2

The material of the thermoelectric device is selected such that it is a good conductor of electricity to generate the current flow but a poor conductor of heat to maintain the needed heat difference between the two sides of the thermoelectric device.

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS9620700B2Wafer scale thermoelectric energy harvester
Publication Date: 2017.04.11 ANALOG DEVICES INC
  • US9620700B2 patent drawing
  • US9620700B2 patent drawing
  • US9620700B2 patent drawing

AI summary

An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer. The p-type thermoelectric elements and the n-type thermoelectric elements may be connected in series while alternating between the p-type and the n-type thermoelectric elements.